High-performance and high-integration-level L-shaped gate-control schottky barrier tunneling transistor

Abstract

The invention relates to a high-performance and high-integration-level L-shaped gate-control schottky barrier tunneling transistor. A schottky barrier formed between a source electrode and an intrinsic silicon source section is used as a tunneling barrier of a device, the characteristic that the barrier height of the schottky barrier is smaller than the silicon band gap is adopted, on the premise that materials narrower than the silicon band gap do not need to be introduced, the tunneling probability higher than that of a common silicon-material-based PIN type tunneling field effect transistor is achieved, and therefore the subthreshold slope and the electric current conduction capacity of the device are accordingly improved. An L-shaped gate electrode is adopted for controlling an intrinsic silicon channel region with the groove structure characteristics; on one hand, the good control effect on the width of the schottky barrier is achieved; on the other hand, the control effect of the gate electrode on a heavy doping drain electrode region is weakened, and the high-performance and high-integration-level L-shaped gate-control schottky barrier tunneling transistor which has the steep subthreshold slope, the good switching characteristic, the high conduction current, the reversed low leakage current and the quiescent dissipation and is suitable for serving as a deep nanoscale integrated circuit design basic unit is achieved.

Description

technical field [0001] The invention relates to the field of ultra-large-scale integrated circuit manufacturing, and relates to a specific structure, a structural unit and a high-performance high-integration L-shaped gate-controlled Schottky barrier tunneling transistor suitable for ultra-high integration integrated circuit manufacturing. Fabrication method of the array. Background technique [0002] Currently, silicon-based PIN-type tunneling field-effect transistors (TFETs), due to their potential to have better switching characteristics and lower power consumption, may replace MOSFETs as deep nanoscale VLSI logic unit or storage unit. However, compared with MOSFETs, its disadvantage is that the subthreshold slope of the PIN tunneling field effect transistor only partially exceeds that of MOSFETs. As the gate electrode voltage increases, the subthreshold slope decreases, and the forward conduction current flows Small. In addition, the drain region of the PIN type tunne...

AI Technical Summary

Problems solved by technology

And it is extremely difficult to form a Schottky barrier on the surface of a heavily doped extrinsic semiconductor, and the heavy doping itself also seriously weakens the gate's ability to control the electric field distribution and carrier distribution of the source and drain regions

Therefore, it is difficult to realize high-performance practical Schottky barrier MOSFETs transistors

Images