Gold-iron alloy interconnection wire and manufacturing method thereof

A technology of gold-iron alloy and production method, which is applied in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., can solve problems such as low resistivity, and achieve the effect of mature technology

Inactive Publication Date: 2011-12-28
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0008] In view of this, the main purpose of the present invention is to provide a gold-iron alloy interconnection wire and its manufacturing method to meet the needs of low resistivity in the field of high-power and high-frequency compound semiconductors. At the same time, the thinning of the interconnection wires, especially To meet the needs of air bridge wiring, that is, the problem of low resistivity and certain strength, through the optimization of electroplating method and electroplating solution, the resistivity and strength of interconnection wires can be controlled

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  • Gold-iron alloy interconnection wire and manufacturing method thereof
  • Gold-iron alloy interconnection wire and manufacturing method thereof
  • Gold-iron alloy interconnection wire and manufacturing method thereof

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Embodiment Construction

[0034] In order to make the objectives, technical solutions, and advantages of the present invention clearer, the following further describes the present invention in detail in conjunction with specific embodiments and with reference to the accompanying drawings.

[0035] Such as figure 1 As shown, figure 1 It is a flow chart of a method for manufacturing a gold-iron alloy interconnection wire provided by the present invention, and the method includes:

[0036] Step 1: Solution configuration;

[0037] The content of gold is 4~13g / L, added with potassium gold cyanide; the content of iron is 0.2~1.2g / L, added with potassium ferrocyanide, conductive salt potassium citrate 20~30g / L, brightener sulfuric acid Cobalt is 0.5~1g / L, and the remaining part is supplemented with high purity water;

[0038] Step 2: Clean the semiconductor chip;

[0039] Clean the semiconductor chip with acetone, ethanol and water in sequence;

[0040] Step 3: Coat a layer of photoresist on the cleaned semiconductor c...

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Abstract

The invention discloses a gold-iron alloy interconnection wire and a manufacturing method thereof. The gold-iron alloy interconnection wire contains two elements of gold and iron, and the iron content is between 0.1% and 0.5%. The method includes: configuring the solution; cleaning the semiconductor chip; coating a layer of photolithography on the cleaned semiconductor chip glue, then expose and develop, photoetch the lines that need to be wired; sputter the seed layer on the chip; coat a layer of photoresist on the semiconductor chip again, then expose and develop, and expose the lines that need to be electroplated, no need The place where the electroplating is thickened is protected with photoresist to achieve selective electroplating; the semiconductor chip is fixed on the fixture, and the semiconductor chip is electroplated; the secondary photoresist is removed with acetone and ethanol; Put it into acetone and ethanol solution, and ultrasonically peel off the purely conductive seed layer during electroplating. The invention satisfies the needs of high power and high frequency compound semiconductor interconnection strength and resistivity.

Description

Technical field [0001] The invention relates to the technical field of integrated circuit metal wiring, in particular to a gold-iron alloy interconnection wire and a manufacturing method thereof. Background technique [0002] With the development of integrated circuits, integrated circuits are running faster and faster, and individual devices are becoming smaller and smaller. At a speed of several hundred MHz, the signal must pass through the metal system fast enough to prevent program delays. . Traditional metal wires such as Al and other metals will be restricted because of the phenomenon of macroscopic movement of metal ions under the action of the current under the condition of large current. When electromigration occurs in integrated circuit chips, metal ions will accumulate near the anode, and in severe cases, hillocks or protrusions will be formed. At the same time, a void appears in the wire near the cathode. In this way, it will cause circuit failure. For the chip man...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/532H01L21/768
Inventor 刘焕明周静涛李博刘新宇
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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