Manufacture method for semiconductor device

Abstract

The invention provides a manufacture method for a semiconductor device. The method comprises the following steps: providing a wafer to be etched, wherein a metal layer is formed on the top of the wafer; adding a first photoresist layer on the wafer; carrying out first exposure and development treatments on the wafer to form a first pattern; carrying out a first etch treatment on the wafer to remove a first portion of the metal layer; removing the first photoresist layer; carrying out a wet cleaning on the wafer; adding a second photoresist layer on the wafer; carrying out second exposure and development treatments on the wafer to form a second pattern; carrying out a second etch treatment on the wafer to remove a second portion of the metal layer; removing the second photoresist layer; and carrying out a wet cleaning on the wafer. According to the method provided in the invention, more photoresist can be provided on the whole wafer to prevent the damage of plasma bombardment, more polymer protection is provided for aluminium wire sidewall to raise the anisotropy of etching, thus the manufacture of semiconductor device with good sidewall morphology and without corrosion defect is realized.

Description

technical field [0001] The present invention relates to a manufacturing method of a semiconductor device, in particular to a double patterning method for etching a high transfer ratio aluminum pad, which can prevent aluminum surface corrosion defects and increase the anisotropy of etching. Background technique [0002] In VLSI, the transistors used are generally Complementary Metal Oxide Semiconductor (CMOS) Field Effect Transistors. The simplified CMOS process consists of 14 processes: (1) double well implantation to form n-well and p-well on the silicon wafer; (2) shallow trench isolation to isolate the active area below the sub-micron technology node; (3) through Grow gate oxide layer, deposit polysilicon and etch to obtain gate structure; (4) lightly doped drain region (LDD) implantation to form shallow implantation of source and drain regions; (5) make sidewalls for subsequent source / drain implantation Protect the channel in the process; (6) medium-energy source / drain...

AI Technical Summary

Problems solved by technology

However, the use of optimized wet cleaning has the problem that it is not compatible with traditional semiconductor manufacturing processes, and optimized wet cleaning will inevitably lead to increased process complexity and increased manufacturing costs.

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