Method for manufacturing super-junction semiconductor device with extended groove

Abstract

The invention discloses a method for manufacturing a novel super-junction semiconductor device with an extended groove. By key process steps of multiple-time extending, multiple-time injecting and etching the extended groove, filling and leveling an insulating medium and then forming an active layer and an electrode and the like, the method realizes the process manufacturing of a novel super-junction structure and super-junction semiconductor device. Compared with the prior art, the method has the following advantages that first, a narrow P column area or N column area with high concentration can be formed to be beneficial to reducing on-resistance; second, the bottom of a groove gate is flush with the lower interface of a body area or is slightly lower than the lower interface of the body area, therefore the withstand voltage performance of the device is increased, and the gate-source and gate-drain capacitance is reduced; third, complicated masking is not needed, and the influence of a small-angle injection technology to a channel region is avoided; and fourth, the negative influences of the extended groove filling and leveling, groove gate manufacturing and leveling to the formed body area, the body contact area and the active area are avoided.

Description

[0001] technical field [0002] The invention relates to a manufacturing method of two super junction structures and a manufacturing method of a super junction semiconductor device. Background technique [0003] Power MOSFET is a multi-subconduction device, which has many advantages such as high input impedance, high frequency, and positive temperature coefficient of on-resistance. These advantages make it widely used in the field of power electronics, greatly improving the efficiency of electronic systems. [0004] The high voltage resistance of the device requires a long drift region and a low doping concentration in the drift region. However, as the length of the drift region increases and the doping concentration decreases, the on-resistance of the device ( ) increases, the on-state power consumption increases, and the on-resistance of the device R on There is the following relationship with the breakdown voltage BV: . [0005] With the advancement of the manufac...

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Problems solved by technology

However, after forming the active region (including the body region, body contact region and source region), the process steps of small-tilt ion implantation, oxide-filled extension trenches and trench gate formation have the following main disadvantages: (1) Process It is difficult to accurately control the height of silicon dioxide in the extension trench

On the one hand, the groove gate must span the body region in the vertical direction (that is, the upper surface of the oxide in the extended trench cannot be higher than the lower surface of the body region); on the other hand, the longer the groove gate overlaps with the drift region, the gate-drain capacitance The larger the , and the withstand voltage of the device decreases with the decrease of the height of silicon dioxide in the extended trench, so the process needs to accurately control the height of silicon dioxide in the extended trench to ensure the electrical performance of the device; (2) the higher the withstand voltage of the device Higher, the deeper the extended trench, the more difficult the implantation, and the smaller the process tolerance; (3) In order to ensure that the ions implanted at a small inclination angle cover all areas below the active layer on both side walls of the trench, and do not cover the areas on the two side walls of the trench For the active layer, the mask for ion implantation is difficult to make, which increases the complexity of the process

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