Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Manufacturing method of thin film transistor array panel

A technology of thin film transistors and array panels, which is applied in the field of manufacturing thin film transistor array panels, and can solve the problems of increasing manufacturing costs and time

Inactive Publication Date: 2007-04-11
SAMSUNG ELECTRONICS CO LTD
View PDF1 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Photolithography step adds manufacturing expense and time

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Manufacturing method of thin film transistor array panel
  • Manufacturing method of thin film transistor array panel
  • Manufacturing method of thin film transistor array panel

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0027] In the drawings, the thicknesses and regions of layers are exaggerated for clarity. Like reference numerals refer to like elements throughout. It will be understood that when an element such as a layer, region or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. In contrast, when it is referred to that an element is "directly on" another element, it means that there are no intervening elements present.

[0028] A TFT array panel according to an embodiment of the present invention will be described in detail with reference to FIGS. 1, 2A and 2B. Fig. 1 is a layout diagram of the lower panel of the TFT array according to an embodiment of the present invention, Fig. 2A is a sectional view taken along the line IIA-IIA of the TFT array panel shown in Fig. 1, and Fig. 2B is a sectional view of the TFT array panel shown in Fig. 1 along the line Sectional view of IIB-IIB interception. ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present invention relates to a manufacturing method of a thin film transistor array panel. The method includes forming a gate line including a gate electrode on a substrate, forming a first insulating layer on the gate line, forming a semiconductor layer on the first insulating layer, forming an ohmic contact on the semiconductor layer, forming a data line including a source electrode and a drain electrode on the ohmic contact, depositing a second insulating layer, forming a first photoresist on the second insulating layer, etching the second insulating layer and the first insulating layer using the first photoresist as an etching mask to expose a portion of the drain electrode and a portion of the substrate, forming a pixel electrode connected to an exposed portion of the drain electrode using selective deposition, and removing the first photoresist.

Description

[0001] Related application reference [0002] This application claims priority and benefit from Korean Patent Application No. 10-2005-0094423 filed with the Korean Intellectual Property Office on October 7, 2005, the contents of which are incorporated herein by reference. technical field [0003] The invention relates to a manufacturing method of a thin film transistor array panel. Background technique [0004] Active matrix display devices such as liquid crystal displays (LCDs) and organic light emitting displays (OLEDs) include a plurality of pixels arranged in a matrix. A pixel includes a switching element, for example, a thin film transistor having a gate electrode, a source electrode, and a drain electrode. Typically, multiple thin film layers can be patterned using repeated photolithography and etching steps to form a TFT array panel. The photolithography step adds manufacturing expense and time. Therefore, it would be advantageous to reduce the number of photolitho...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/84H01L21/768G03F7/20G03F7/004G03F7/00G02F1/136
CPCH01L27/1288H01L27/1214G02F1/136
Inventor 裴良浩郑敞午李制勋赵范锡
Owner SAMSUNG ELECTRONICS CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products