Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Lateral double-diffusion field effect transistor, manufacturing method, chip and circuit

A field effect transistor, lateral double diffusion technology, applied in circuits, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as driving capability and speed difference, and achieve increased speed, guaranteed breakdown voltage, and reduced effective mass. Effect

Active Publication Date: 2022-04-01
BEIJING CHIP IDENTIFICATION TECH CO LTD +1
View PDF16 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Aiming at the technical problem of poor driving capability and speed of lateral double diffused field effect transistors in the prior art, the present invention provides a method for manufacturing a lateral double diffused field effect transistor, a lateral double diffused field effect transistor, a chip and a A kind of circuit, the lateral double-diffusion field effect transistor prepared by this method can improve the mobility of carriers in the channel, and improve the driving ability and speed of the transistor

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Lateral double-diffusion field effect transistor, manufacturing method, chip and circuit
  • Lateral double-diffusion field effect transistor, manufacturing method, chip and circuit
  • Lateral double-diffusion field effect transistor, manufacturing method, chip and circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0031] The specific implementation manners of the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation manners described here are only used to illustrate and explain the embodiments of the present invention, and are not intended to limit the embodiments of the present invention.

[0032] It should be noted that, in the case of no conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0033] In the present invention, unless stated to the contrary, the used orientation words such as "up, down, top, bottom" generally refer to the directions shown in the drawings or refer to the vertical, perpendicular or gravitational directions The terms used to describe the mutual positional relationship of the various components mentioned above.

[0034] The present invention will be described in detail bel...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a lateral double-diffusion field effect transistor, a manufacturing method, a chip and a circuit, and the transistor comprises a substrate which is provided with a high-voltage N-type well; the first N-type drift region, the P-type body region and the second N-type drift region are adjacently arranged and are formed in the high-voltage N-type well; the first tensile strain region is formed in the first N-type drift region; the second tensile strain region is formed in the second N-type drift region; the first drain electrode is formed in the first tensile strain area; the second drain electrode is formed in the second tensile strain area; the first source electrode and the second source electrode are formed in the P-type body region; the substrate electrode is formed between the first source electrode and the second source electrode; the first grid electrode is formed on the upper surfaces of the first N-type drift region and the P-type body region; and the second grid electrode is formed on the upper surfaces of the P-type body region and the second N-type drift region, and a gap is formed between the second grid electrode and the first grid electrode. According to the transistor provided by the invention, the mobility of carriers in a channel can be improved, and the driving capability and speed of the transistor are improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a lateral double-diffused field-effect transistor, a lateral double-diffused field-effect transistor, a chip and a circuit. Background technique [0002] As a lateral power device, the Lateral Double-Diffused MOSFET (LDMOS) has its electrodes located on the surface of the device, and is easy to achieve monolithic integration with low-voltage signal circuits and other devices through internal connections. With the advantages of high voltage, large gain, good linearity, high efficiency, and good broadband matching performance, it has been widely used in power integrated circuits, especially low power consumption and high frequency circuits. [0003] In the prior art, silicon is often used as the substrate in the channel region of the lateral double-diffused field effect transistor, and the carrier mobility in the silicon substrate is low, which aff...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L29/06H01L29/78H01L21/336
Inventor 余山赵东艳王于波陈燕宁付振刘芳王凯吴波邓永峰刘倩倩郁文
Owner BEIJING CHIP IDENTIFICATION TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products