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Electret-based synapse transistor and preparation method thereof

An electret and transistor technology, which is applied in the field of electret-based synaptic transistors and their preparation, can solve problems such as the lack of synaptic transistors, and achieve the effects of high switching ratio and improved accuracy

Active Publication Date: 2020-05-19
FUZHOU UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, synaptic devices based on organic transistors have not yet had electret-based synaptic transistors

Method used

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  • Electret-based synapse transistor and preparation method thereof
  • Electret-based synapse transistor and preparation method thereof
  • Electret-based synapse transistor and preparation method thereof

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preparation example Construction

[0029] Preferably, this embodiment also provides a method for preparing an electret-based synaptic transistor, comprising the following steps:

[0030] Step S1: cleaning the substrate, ie cleaning the substrate with the insulating layer;

[0031] Step S2: Dissolving the organic electret material in an organic solvent in a certain proportion, fully heating and stirring, after fully dissolving, spin-coat a uniform film on the substrate, and perform annealing treatment under air conditions to obtain an electret polar body dielectric layer;

[0032] Step S3: The organic macromolecular copolymer material is dissolved in an organic solvent in a certain proportion, fully heated and stirred, and continued on the electret layer by spin coating or scraping coating, and then annealed under air conditions to obtain organic semiconductor layer;

[0033] Step S4: Evaporate a layer of top electrode on the organic semiconductor layer through a mask plate by vacuum evaporation deposition.

...

Embodiment 1

[0039] Step 1: Cut the SiO with 100 nm 2 The silicon wafers were soaked in acetone and isopropanol for 2 min, washed with deionized water, and then dried with nitrogen to obtain clean silicon wafers. figure 1 Parts (100) and (110).

[0040] Step 2: Prepare polymer electret poly(2-vinylnaphthalene) (PVN) at 3 mg·mL -1 The concentration was dissolved in toluene solvent with a purity of 99.99%, placed on a heating platform, and heated at 60 °C for 2 h until it was completely dissolved.

[0041] Step 3: Prepare the polymer semiconductor material PDVT-10 at 5 mg·mL -1 The concentration was dissolved in chlorobenzene solvent, then heated, heated at 60 °C and stirred at 500 rpm for 12 h.

[0042] Step 4: Take about 0.1 mL of PVN solution with a rubber dropper, slowly drop it on the cleaned Si substrate, cover the substrate completely and start spin coating, the spin coating speed is 3000 rpm, and the rotation acceleration is 500 rpm / s, the spin coating time is 60 s. After stand...

Embodiment 2

[0046] Step 1: Cut the SiO with 100 nm 2 The silicon wafers were soaked in acetone and isopropanol for 2 min, then washed with deionized water, repeated three times, ultrasonically cleaned three times, and then dried with nitrogen to obtain clean silicon wafers.

[0047] Step 2: Configure polymer electret PVN to 5mg·mL -1 The concentration was dissolved in toluene solvent with a purity of 99.99%, placed on a heating platform, and heated at 60 °C for 2 h until it was completely dissolved.

[0048] Step 3: Prepare polymer semiconductor material ID-TBT at 10 mg·mL -1 The concentration was dissolved in chloroform solvent, then heated, heated at 60°C and stirred at 500 rpm for 12 h.

[0049] Step 4: Take the fully dissolved PVN solution with a 1ml syringe, slowly drop it on the cleaned Si substrate, and start spin coating after covering the substrate completely. The spin coating speed is 3000 rpm, and the rotation acceleration is 500 rpm / s. The spin coating time was 60 s. Let i...

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Abstract

The invention relates to an electret-based synapse transistor and a preparation method thereof. The transistor is composed of a substrate with an insulating layer, an electret dielectric layer, an organic semiconductor layer and a top electrode from bottom to top. The electret dielectric layer forms an interface capture layer between the insulating layer and the semiconductor, and the interface capture layer is used for capturing electrons and holes, forming an additional electric field and playing an additional grid regulation and control role on the semiconductor layer. The transistor has ahigh switching ratio and a large conductance regulation and control range, the conductance increase and the regulated and controlled pulse number are in a good linear relation, the transistor is suitable for neuromorphic calculation, the pattern recognition precision is effectively improved, and an application prospect is provided for future artificial synapses.

Description

technical field [0001] The invention relates to the field of electronic materials and devices, in particular to an electret-based synaptic transistor and a preparation method thereof. Background technique [0002] Traditional computing is limited by the von Neumann bottleneck due to the independence of storage and processing. Neuromorphic computing can perform multiple tasks at the same time by simulating the human brain nervous system, such as learning, storing and transmitting information, and it has the characteristics of high efficiency and low efficiency. Neuromorphic computing inspired by the nervous system of the human brain will overcome the problem of independent information processing and storage. Artificial synapse devices, as the basic unit of neuromorphic computing systems, can perform signal processing with low power consumption. A variety of synaptic devices exist today, such as resistive random access memory (RRAM), phase change memory (PCM), memristor, and...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L51/05H01L51/40
CPCH10K10/476H10K10/466
Inventor 陈惠鹏俞礽坚陈耿旭郭太良李恩龙
Owner FUZHOU UNIV
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