Miniaturized high-density system-level logic circuit

Abstract

The invention relates to a miniaturized high-density system-level logic circuit. FPGA minimum system circuits such as an FPGA bare chip, a FLASH bare chip, a power supply circuit, a decoupling circuitand a configuration circuit are realized in a miniaturized ceramic circuit; on hardware, through ten-layer high-density ceramic circuit wiring, pyramid chip stacking and a ceramic cavity opening process, three-dimensional integration miniaturization of the circuit is achieved, an oscillator calibration circuit is achieved in an FPGA, and a dynamic oscillator frequency calibration function is achieved through a negative feedback loop. Hardware potential is fully excavated, innovation is achieved from a software architecture, the parallel computing capacity of an FPGA and the storage characteristic of FLASH are brought into play, a logic control circuit, a communication circuit and a data management circuit are customized and designed, and a powerful and complex logic function and a memoryfunction are achieved in combination with an RISC-V controller; the logic circuit has the advantages of high integration level, small size, high reliability, programmability, memorability and the like.

Description

technical field [0001] The invention is a miniaturized high-density system-level logic circuit, which belongs to the technical field of system circuits. Background technique [0002] Since the 1990s, portable, miniaturized electronic products, aerospace, and military electronics have entered a period of rapid development, requiring semiconductor devices to maximize miniaturization, light weight, and high density while meeting high reliability. Integrated circuit technology came into being. However, the current process technology of integrated circuits has approached its physical limit, and Moore's Law will not be maintained. In this context, System in Package (SIP) is proposed as an important technology of "More than Moore". The concept of "Moore's Law" focuses on the level of system integration and provides a new direction for the development of the electronics industry. [0003] International Technology Roadmap for Semiconductors (ITRS, International Technology Roadmap ...

AI Technical Summary

Problems solved by technology

[0012] In traditional FPGA devices, all functional PADs are fan-out, the number of PADs is large, the arrangement is complex, and the device is large in size; when the FPGA is working, a reference clock must be provided externally as the working clock, and the reference clock will interfere with the radio frequency circuit. It may even cause the circuit to fail to work normally; FPGA storage data is usually connected to an external dedicated storage device, which is large in size and complex in circuit; when designing the PCB of the FPGA system, at least 10 layers of layout are required, and the design of PCB layout is difficult and the processing cycle is long. product development cycle

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