A preparation method of a high-efficiency N-type double-sided battery with double-sided tunneling oxidation passivation
A technology of tunnel oxidation and double-sided cells, applied in circuits, photovoltaic power generation, electrical components, etc., can solve the problems of high equipment cost, poor repeatability, and unsatisfactory cell preparation methods, and achieves solutions to thickness non-uniformity and improvement. The effect of A-grade yield, excellent passivation effect
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Embodiment 1
[0040] A method for preparing a high-efficiency N-type double-sided battery with double-sided tunneling oxidation passivation, using the following steps:
[0041] (1) Remove the damaged layer and texture the silicon wafer in the alkali texture tank to form a pyramid texture with a height of 3 μm;
[0042] (2) Control the temperature of the boron source high-temperature diffusion furnace tube: 950°C, diffuse for 40 minutes, and form B-doped p on the surface of the silicon wafer + launch junction;
[0043] (3) HF solution to remove the borosilicate glass (BSG) layer, use HNO 3 Wet etching process of mixed solution such as / HF to remove the B-doped p on the back of the battery + Junction, and polish the back of the battery;
[0044] (4) Prepare ultra-thin tunnel oxide layer SiO on the back of the cell by wet chemical or high temperature thermal oxidation process 2 , thickness 1.8nm, based on PECVD method with high-purity SiH 4 After preparing the gas source at 500°C, after h...
Embodiment 2
[0053] A method for preparing a high-efficiency N-type double-sided battery with double-sided tunneling oxidation passivation, using the following steps:
[0054] (1) Remove the damaged layer and texture the silicon wafer in the alkali texture tank to form a pyramid texture with a height of 1 μm;
[0055] (2) Control the temperature of the boron source high-temperature diffusion furnace tube to 850°C, place the silicon wafer in it for 80 minutes to diffuse, and form B-doped p on the surface of the silicon wafer. + launch junction;
[0056] (3) Remove the borosilicate glass (BSG) layer of the silicon wafer with HF solution, and then use HNO 3 Wet etching process of / HF mixed solution to remove the B-doped p on the back + knot and polish the backside;
[0057] (4) Preparation of ultra-thin tunnel oxide layer SiO on the back of silicon wafer by wet chemical process 2 , the temperature is controlled at 50°C, the solution used is a pure nitric acid solution with a concentration...
Embodiment 3
[0064] A method for preparing a high-efficiency N-type double-sided battery with double-sided tunneling oxidation passivation, using the following steps:
[0065] (1) Remove the damaged layer and texture the silicon wafer in the alkali texture tank to form a pyramid texture with a height of 2 μm;
[0066] (2) Control the temperature of the boron source high-temperature diffusion furnace tube to 900 ° C, place the silicon wafer in it for 50 minutes to diffuse, and form B-doped p on the surface of the silicon wafer. + launch junction;
[0067] (3) Remove the borosilicate glass (BSG) layer of the silicon wafer with HF solution, and then use HNO 3 Wet etching process of / HF mixed solution to remove the B-doped p on the back + knot and polish the backside;
[0068] (4) Preparation of ultra-thin tunnel oxide layer SiO on the back of silicon wafer by wet chemical process 2 , the temperature is controlled at 120°C, the solution used is a pure nitric acid solution with a concentrat...
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