Circuit structure for accelerating convolutional layer and fully connected layer of neural network
A fully connected layer, neural network technology, applied in the field of integrated circuit design, can solve the problem of redundant chip area, and achieve the effect of reducing chip area, improving utilization rate, and improving work efficiency
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[0024] In the present invention, the basic block diagram of the circuit that can accelerate the convolutional layer and the fully connected layer at the same time is as follows: figure 1 shown. The working process of the design is as follows: input the features and corresponding weights of each layer, and store them in the external memory (DRAM) described in claim 5 . First, the feature / weight prefetching module reads the features and weights that will be involved in the operation from the external memory and puts them into the local cache. The new data will replace the old and no longer used data in the local cache; then, the control circuit will take out the features and weights that will be involved in the calculation from the local cache according to the order of operations, and send them to the matrix operation unit. After rearranging the features and weights, the operations of the convolutional layer and the fully connected layer are mapped to a series of matrix operat...
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