A method for fabricating a self-aligned double-mesa device structure
A technology of device structure and fabrication method, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of affecting chip-to-chip consistency, reducing process yield, device structure failure, etc., and achieving accurate diameter and size Controllable, reduce device cost, and improve tape-out efficiency
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[0031] In order to further illustrate the technical means and effects adopted by the present invention to achieve the predetermined invention objectives, the specific implementation manners of the present invention will be described below in conjunction with examples of the invention.
[0032] Select PIN structure GaN material, such as figure 2 shown. An implementation mode corresponding to the fabrication method of the self-aligned double-mesa device structure of the present invention is as follows:
[0033] Step 1, prepare a small mesa photolithographic pattern 4 on the P-doped layer, such as image 3 shown.
[0034] The photoresist used in the implementation is AZ4620, and the photoresist spin-coating condition is: 2000 revolutions, 30 seconds. After pre-baking at 100°C for 150 seconds, photolithographic exposure for 40 seconds, and developing with a developer for 2 minutes, a small mesa photolithographic pattern 4 is formed. The obtained photolithographic pattern 4 ha...
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