A kind of method for preparing SOI silicon chip with ultra-thick buried oxide layer

Abstract

The invention discloses a method for preparing an SOI silicon chip with an ultra-thick buried oxide layer, wherein the method belongs to the field of semiconductor material preparation technology. According to the method of the invention, the SOI silicon chip with the ultra-thick buried oxide layer is prepared through successively performing buried oxide layer preparation, hydrogen ion injection, bonding and chip splicing on a monocrystalline silicon wafer, wherein the thickness of the buried oxide layer is 2-5 mu m. The preparation process of the buried oxide layer comprises a thermo-oxidizing process, a CVD process and a thermo-oxidizing process. The method of the invention can be used for preparing the ultra-thick buried oxide layer (with thickness of 2-5 mu m) and furthermore can obtain an SOI silicon chip bonding interface with relatively high surface compactness and relatively good interface state.

Description

technical field [0001] The invention relates to the technical field of semiconductor material preparation, in particular to a method for preparing an SOI silicon wafer with an ultra-thick buried oxide layer. Background technique [0002] SOI (Silicon-On-Insulator, silicon on insulating substrate) technology is to isolate the silicon dioxide film (buried layer oxide layer) between the top layer of silicon and the silicon substrate, so as to more effectively eliminate various body parasitic effects , greatly improving the performance of CMOS devices. Integrated circuits made of SOI materials also have the advantages of small parasitic capacitance, high integration density, fast speed, simple process, small short channel effect, and are especially suitable for low-voltage and low-power circuits. The mainstream technology of submicron low-voltage and low-power integrated circuits. [0003] An SOI wafer having a structure such as a base wafer, a buried oxide layer, and a device...

AI Technical Summary

Problems solved by technology

Use the existing thermal oxidation process to prepare the silicon dioxide layer, the recommended thickness is 0.005μm-2μm, and some high-temperature, high-frequency, high-power, high-voltage optoelectronic and radiation-resistant devices and MEMC technical fields require an ultra-thick oxide layer As the SOI substrate of the isolation layer, this ultra-thick oxide layer refers to an oxide layer with a thickness of 2 μm-10 μm or more. The high temperature of the time will cause serious warping of the SOI wafer

The CVD process to prepare this ultra-thick buried oxide layer can avoid this phenomenon, but the surface roughness of the silicon dioxide layer grown by CVD chemical vapor deposition is not dense enough, and the film thickness uniformity is poor

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