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Embedded flash memory, manufacturing method therefor, and electronic device

An electronic device and embedded technology, applied in the direction of circuits, electrical components, electric solid devices, etc., can solve the problems of holes, deposition of floating gates, etc., to avoid holes, improve coupling performance, and good breakdown voltage performance Effect

Inactive Publication Date: 2016-08-10
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] There is the following contradiction in the filling of the logic process and the flash memory process. When the critical dimension of the active region is large, the critical dimension of the shallow trench isolation structure is small and has a large aspect ratio. The process creates holes in the shallow trench isolation oxide, such as Figure 2a and 2b As shown in A; but when the critical dimension of the active region is small, when the floating gate structure is formed on the active region, holes will be generated in the process of depositing the floating gate, such as Figure 2b Shown in B

Method used

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  • Embedded flash memory, manufacturing method therefor, and electronic device

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preparation example Construction

[0055] The preparation method of the embedded flash memory described in the prior art is as Figures 1a-1g As shown, first as Figure 1a As shown, a semiconductor substrate 101 is provided on which an oxide layer 102 and a nitride layer 103 are formed and patterned to form shallow trenches in the oxide layer 102 and the nitride layer 103 , choose shallow trench oxide 104 to fill the shallow trench, and obtain the following Figure 1a pattern shown.

[0056] Then, the nitride layer 103 is removed to obtain Figure 1b structure shown.

[0057] Next, a floating gate material layer 105 is deposited to cover the oxide layer 102 and the shallow trench oxide 104, to obtain the following Figure 1c structure shown.

[0058] planarizing the floating gate material layer 105 and the shallow trench oxide 104 to a smaller thickness, such as Figure 1d shown.

[0059] Etching back the shallow trench oxide 104 to the oxide layer 102 to form openings in the floating gate material layer...

Embodiment 1

[0064] Step 201 is executed to provide a substrate 201 on which a high voltage oxide layer 203 and a tunnel oxide layer 202 are respectively formed on different regions.

[0065] Specifically, such as Figure 3a As shown, the base 201 includes at least a semiconductor substrate, and the semiconductor substrate can be at least one of the materials mentioned below: silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), stack-on-insulator Silicon germanium (S-SiGeOI), silicon germanium on insulator (SiGeOI) and germanium on insulator (GeOI), etc.

[0066] Wherein, the tunnel oxide layer 202 and the high voltage oxide layer 203 can be formed by the following method, but the method is only exemplary, and the method includes: first forming the high voltage oxide layer 203 on the substrate , wherein, the high voltage oxide layer 203 can be selected from commonly used materials in the field.

[0067] Next, part of the high voltage oxide layer 203 is removed to expose the ...

Embodiment 2

[0119] The present invention also provides an embedded flash memory, comprising:

[0120] base;

[0121] a high voltage oxide layer and a tunnel oxide layer in different regions of the substrate;

[0122] a shallow trench isolation structure, the bottom of which is embedded in the substrate;

[0123] active regions located in the substrate and isolated from each other by the shallow trench isolation structure;

[0124] T-shaped floating gates are arranged at intervals on the active region, and the horizontal part of the T-shaped floating gate covers part of the top of the shallow trench isolation structure.

[0125] Wherein, the critical dimension at the top of the T-shaped floating gate is 60-130 nm, and the critical dimension at the bottom is 50-75 nm.

[0126] The thickness of the shallow trench isolation structure is 100-1000 angstroms.

[0127] The embedded flash memory further includes:

[0128] an isolation layer located above the T-shaped floating gate;

[0129] ...

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Abstract

The present invention relates to an embedded flash memory, a preparation method thereof, and an electronic device. The method includes step S1: providing a substrate, and a high-voltage oxide layer and a tunneling oxide layer are respectively formed on different regions of the substrate; step S2: Depositing a floating gate material layer and a mask layer on the high voltage oxide layer and the tunnel oxide layer, and forming a shallow trench extending into the substrate in the floating gate material layer and the mask layer trench isolation oxide; step S3: remove the mask layer to expose a part of the height of the shallow trench isolation oxide; step S:4: etch back the exposed shallow trench isolation oxide to reduce the exposed The critical dimension of the shallow trench isolation oxide; step S5: depositing the floating gate material layer to the top of the shallow trench isolation oxide again, and step S6 etching the floating gate material layer and the shallow trench isolation Oxide; step S7 : removing the portion of the shallow trench isolation oxide where the critical dimension is reduced, so as to form a T-shaped floating gate.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to an embedded flash memory, a preparation method thereof, and an electronic device. Background technique [0002] In the current semiconductor industry, integrated circuit products can be mainly divided into three types: logic, memory and analog circuits, among which memory devices account for a considerable proportion of integrated circuit products. Among storage devices, the development of flash memory (flash memory for short) is particularly rapid in recent years. Its main feature is that it can keep stored information for a long time without power on, and has many advantages such as high integration, fast access speed, easy erasure and rewriting, etc. The field has been widely used. [0003] With the development of semiconductor technology, storage devices are more widely used, and the storage device and other device regions need to be formed on a chip at ...

Claims

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Application Information

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IPC IPC(8): H01L21/8247H01L27/115
Inventor 王新鹏
Owner SEMICON MFG INT (SHANGHAI) CORP
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