Fabrication method of field-effect transistor and field-effect transistor fabricated by employing fabrication method

Abstract

The invention discloses a method for fabricating a field-effect transistor by employing an electric fluid direct-writing process. The method comprises the following steps of (1) fabricating an organic semiconductor thin film on a substrate; (2) fabricating linear fibers in parallel on the substrate with the semiconductor thin film by using the electric fluid direct-writing process; (3) fabricating parallel dielectric fibers perpendicular to the linear fibers by electric fluid direct writing; (4) vacuum-depositing metal on the substrate; and (5) applying conductive sliver paste onto the two ends of the dielectric fibers, and leading out a grid electrode. The invention also discloses a corresponding product. According to the method, a transistor channel is obtained by means of the dielectric micro-nano fibers, the length side of the channel is equivalent to the diameter sizes of the fibers and can reach sub-micron even nanoscale, and meanwhile, the fibers are also an insulation layer of the transistor; and moreover, through one-time metal vacuum deposition, a source, a drain and a grid of the field-effect transistor can be simultaneously formed. By the method, the fabrication process step of the transistor is greatly simplified, and meanwhile, the fabrication cost is reduced.

Description

technical field [0001] The invention relates to a preparation method of a field effect transistor and a field effect transistor prepared by using the method. Background technique [0002] Field Effect Transistor (FET) is an active device that uses an electric field to control the conductivity of semiconductor materials. It is one of the most widely used devices in modern electronics. Fields play an irreplaceable role. [0003] In order to be more suitable for integrated circuits and improve the electrical performance of field effect transistors, the length of the transistor channel needs to be effectively controlled, and the process of manufacturing micro-nano-level semiconductor channels with high efficiency, high precision and low cost has attracted much attention. Traditional methods of manufacturing transistor channels include photolithography and nanoimprinting. Among them, photolithography requires high-precision masks, which are costly and complicated; nanoimprinting...

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Problems solved by technology

[0005] The above-mentioned method of using electrofluidic technology to print micro-nano fibers to prepare transistor channels has the advantages of high resolution, low cost, and simple steps. However, this method requires the process of eliminating or dissolving the fibers. For the top contact When the fiber is removed, the transistor with the structure is particularly easy to damage the semiconductor active layer, which affects the conductivity of the transistor; in addition, the field effect transistor prepared in the above method cannot realize the self-alignment of the gate electrode and the source-drain electrode, which will cause the gate - The parasitic capacitance between the source electrodes and the gate-drain electrodes is too large, which deteriorates the high-frequency characteristics of the device

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