Method for stabilizing threshold voltage of word line of flash memory cell

Abstract

The invention provides a method for stabilizing the threshold voltage of the word line of a flash memory cell, comprising: arranging photoresist on a silicon chip, and removing the photoresist on the active area of ​​the silicon chip, leaving the photoresist; the first implantation process is performed on the flash memory cell formation area of ​​the active region of the silicon wafer, wherein the implantation conditions of the first implantation process are selected so that the desired floating gate lower threshold is formed in the final flash memory cell; the silicon wafer Performing a flash memory cell formation process to form a flash memory cell on the flash memory cell formation area of ​​the active area; performing a second implantation process on the active area of ​​the silicon wafer so as to form a doped silicon wafer area corresponding to the word line on both sides of the flash memory cell , wherein the implantation conditions of the second implantation process are selected such that a desired word line lower threshold is formed in the final flash memory cell. Wherein, no ion implantation is performed on the formation region of the flash memory unit during the formation process of the flash memory unit.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, and more specifically, the invention relates to a method for stabilizing the threshold voltage of a word line of a flash memory unit. Background technique [0002] For current flash memory products (flash memory products with a line width of 0.12um), there are large changes in the test parameter word line threshold voltage (VtWL). Specifically, the word line threshold voltage VtWL depends on two factors: one factor is the word line lower threshold (Vt1), and the other factor is the floating gate lower threshold (Vt2). [0003] The unstable word line threshold voltage VtWL is due to the influence of thickness variation of the silicon nitride of the floating gate on the next cell implantation. The implantation energy peak value of 40 keV for cell implanted boron (Boron) roughly corresponds to a thickness of about 1300 Å. And small thickness changes will drastically change the threshold....

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Problems solved by technology

[0006] However, since the desired lower threshold Vt2 of the floating gate is affected by the first implantation and the second implantation, and the second implantation is easily affected by the thickness of the previously formed layer, the desired lower threshold Vt2 of the floating gate is very difficult to obtain. may not be precise

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