Method for stabilizing flash memory unit word line threshold voltage

Abstract

The invention provides a method for stabilizing flash memory unit word line threshold voltage. The method includes the steps that photoresist is distributed on a silicon wafer, the photoresist on an active area of the silicon wafer is removed, and the photoresist on the peripheral portion of the silicon wafer is left; first injection treatment is executed on a flash memory unit forming area of the active area of the silicon wafer, and an injection condition of the first injection treatment is selected so that an expected floating gate lower threshold can be formed on a final flash memory unit; the flash memory unit forming process is executed on the silicon wafer so that the flash memory unit can be formed on the flash memory unit forming area of the active area; second injection treatment is executed on the active area of the silicon wafer so that doping can be formed on the positions, corresponding to the silicon wafer area, of word lines on the two sides of the flash memory unit, and an injection condition of the second injection treatment is selected so that an expected word line lower threshold can be formed on the final flash memory unit, wherein ion injection is not carried out on the flash memory unit forming area in the flash memory unit forming process.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, and more specifically, the invention relates to a method for stabilizing the threshold voltage of a word line of a flash memory unit. Background technique [0002] For current flash memory products (flash memory products with a line width of 0.12um), there are large changes in the test parameter word line threshold voltage (VtWL). Specifically, the word line threshold voltage VtWL depends on two factors: one factor is the word line lower threshold (Vt1), and the other factor is the floating gate lower threshold (Vt2). [0003] The unstable word line threshold voltage VtWL is due to the influence of thickness variation of the silicon nitride of the floating gate on the next cell implantation. The implantation energy peak value of 40 keV for cell implanted boron (Boron) roughly corresponds to a thickness of about 1300 Å. And small thickness changes will drastically change the threshold....

AI Technical Summary

Problems solved by technology

[0006] However, since the desired lower threshold Vt2 of the floating gate is affected by the first implantation and the second implantation, and the second implantation is easily affected by the thickness of the previously formed layer, the desired lower threshold Vt2 of the floating gate is very difficult to obtain. may not be precise

Images