Semiconductor technology method and semiconductor structure

Abstract

The invention provides a semiconductor technology method and a semiconductor structure, and the method comprises the steps: supplying a semiconductor substrate; forming an N-type field-effect transistor and a P-type field-effect transistor on the semiconductor substrate; forming a first protection layer on the surfaces of the N-type and P-type field-effect transistors; carrying out the operations of ion implantation and peak annealing for the first protection layer, thereby forming a second protection layer; carrying out selective etching for the second protection layer of the P-type field-effect transistor and the semiconductor substrate, thereby forming a drain groove and a source groove; growing a semi-conductor alloy layer in the drain groove and the source groove; and eliminating the second protection layer. In the invention, the deposition of the semi-conductor alloy layer on the second protection layer is inhibited, a growth technology window of the semi-conductor alloy layer is enlarged, and the performance of a device is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor device manufacturing, in particular to a semiconductor process method and a semiconductor structure. Background technique [0002] With the rapid development of VLSI technology, the size of field effect transistor devices (MOSFET) is constantly decreasing, how to improve the mobility and device performance (especially PMOS) has become the most difficult problem to solve in the development of new processes. Embedded silicon germanium technology (EmbeddingSiGe) at the source and drain ends can effectively improve the mobility of holes. The mobility of carriers depends on the effective mass of carriers and the scattering of various mechanisms during the movement process. Reducing the effective mass of carriers or reducing the probability of scattering can increase the mobility of carriers. Embedded silicon germanium technology at the source and drain ends improves the hole mobility of PMOS by ...

AI Technical Summary

Problems solved by technology

[0007] However, there are following defects in the existing source-drain end embedding silicon germanium technology: in the silicon-germanium epitaxial process, due to the selective epitaxial process, the germanium-silicon alloy is easy to grow in the groove on the silicon surface of the source-drain region, and Due to the silicon nitride protective layer on the polysilicon gate, silicon germanium is difficult to nucleate and grow on its surface

However, since there are free dangling bonds of silicon atoms in silicon nitride, and as long as the concentration of such free dangling bonds is higher than a certain value, silicon germanium will grow on silicon nitride, giving germanium silicon epitaxy in the source and drain groove regions and subsequent nitrogen The removal of the silicon oxide protective layer has a great impact

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