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Super junction semiconductor device manufacturing method capable of improving avalanche capacity

A superjunction semiconductor and device technology, which is applied in the field of preparation of superjunction semiconductor devices, can solve the problems of reduced breakdown voltage, aggravated lateral diffusion, and increased on-resistance, so as to reduce lateral diffusion and reduce doping concentration gradient. , the effect of increasing the effective width

Active Publication Date: 2014-02-05
XIAN LONTEN RENEWABLE ENERGY TECH +1
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Using a higher P-column doping concentration can appropriately improve the avalanche capability of power semiconductor devices, but a higher P-column doping concentration intensifies the lateral diffusion and increases the on-resistance accordingly, and the charge imbalance between the P-column and N-column This reduces the breakdown voltage

Method used

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  • Super junction semiconductor device manufacturing method capable of improving avalanche capacity
  • Super junction semiconductor device manufacturing method capable of improving avalanche capacity
  • Super junction semiconductor device manufacturing method capable of improving avalanche capacity

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Embodiment

[0055] This embodiment is described using a MOSFET having a superjunction structure, but the present invention is not limited to MOSFETs.

[0056] 1. Substrate material preparation, using N with a resistivity of 0.001Ω??cm + Zone-melted single crystal silicon substrate 1, the crystal orientation of which is ;

[0057] Second, in N + A 5 μm N-type epitaxial layer with a resistivity of 4Ω??cm is epitaxially grown on the substrate as a P column and N + buffer layer between substrates;

[0058] 3. Epitaxial growth of a 5 μm N-type epitaxial layer with a resistivity of 4Ω??cm on the surface of the silicon wafer;

[0059] 4. Deposit 6 μm negative photoresist on the surface of the silicon wafer (i.e., perform boron ion implantation where there is a P-pillar pattern), use a P-pillar mask to expose and develop, and then perform four high-energy boron ion implantations. The energy of boron ions is 3.5MeV, 2.5MeV, 1.2KeV and 200KeV in sequence, and the dose of boron ions implanted is...

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Abstract

The invention relates to a super junction semiconductor device manufacturing method capable of improving the avalanche capacity. On-resistance is increased correspondingly due to transverse diffusion caused by the traditional high dosage concentration of a column P, and puncture voltage is reduced due to electric charge unbalance of the column P and a column N. According to the method, the epitaxy technology is utilized to form an N-type epitaxy layer; a P-type and N-type epitaxy layer is formed by injecting boron ions; the injection amount of the boron ions increases gradually, and the boron ions are pushed under the high temperature to form a P-type and N-type alternant epitaxy layer; a Pbody area is formed by injecting the boron ions; a polycrystalline silicon gate electrode is formed by etching polycrystalline silicon through the dry method; an N+ source area is formed by injecting arsenic ions; a layer of aluminum is deposited on the upper surface of a whole device, a source metal electrode is formed by etching the aluminum, and a drain electrode is formed on the back face through metallization. According to the super junction semiconductor device obtained through the method, the avalanche capacity of the super junction semiconductor device is improved, and at the same time, on-resistance is reduced.

Description

technical field [0001] The invention belongs to the field of semiconductor devices and process manufacturing, and in particular relates to a preparation method of a super junction semiconductor device capable of improving avalanche capability. Background technique [0002] Super junction VDMOS is a new type of power semiconductor device with rapid development and wide application. It introduces a superjunction (Superjunction) structure on the basis of ordinary vertical double-diffused metal oxide semiconductor (VDMOS), so that it has VDMOS high input impedance, fast switching speed, high operating frequency, voltage control, good thermal stability, and drive The circuit is simple, and overcomes the shortcoming that the on-resistance of VDMOS and the breakdown voltage increase sharply in the relationship of 2.5 powers. At present, super-junction VDMOS has been widely used in power supplies or adapters of consumer electronics products such as computers, mobile phones, lightin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L21/266H01L21/331
CPCH01L29/0634H01L29/36H01L29/66712H01L29/7803
Inventor 姜贯军陈桥梁陈仕全马治军杜忠鹏
Owner XIAN LONTEN RENEWABLE ENERGY TECH
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