Scan chain trigger capable of tolerating soft errors

Abstract

The invention relates to the field of reliability of the integrated circuit technology, and discloses a scan chain trigger capable of tolerating soft errors. The scan chain trigger capable of tolerating the soft errors comprises a multiplexer (MUX), a parallel trigger module (Multi-FF), a soft error processing unit (C-element) and a holding circuit (Keeper). The scan chain trigger capable of tolerating the soft errors has three working modes including the error tolerance mode, the scan test mode and the low-power-consumption mode. Compared with an existing scan chain trigger (EC design) capable of tolerating the soft errors, the scan chain trigger capable of tolerating the soft errors has the identical functions on the premise that performance, such as the area, power consumption and delay, of the scan chain trigger is improved, the control timing sequence is simplified when scan testing is carried out, the number of original control clocks is four, and is reduced to one, and the scan chain trigger capable of tolerating the soft errors can be more easily applied to normal ATE scan tests.

Description

technical field [0001] The invention relates to the reliability field of integrated circuits, in particular to a scan chain flip-flop that can tolerate soft errors. Background technique [0002] From the perspective of the development of integrated circuits, high reliability is the commanding height of integrated circuit design from beginning to end. Integrated circuits have been widely used in safety-critical fields such as banking, communication, medical treatment, industrial control, aerospace and military. Therefore, the high reliability design of integrated circuits has become a new focus of attention. Since 80% to 90% of chip failures are caused by soft errors, soft error tolerance technology has become a very critical link in the high reliability design of integrated circuits. [0003] Soft errors can be defined as erroneous changes that do not change the physical circuit but only change the data content. The main cause of soft errors is radiation, such as ray ion r...

AI Technical Summary

Problems solved by technology

[0017] pass image 3 and Figure 4 It can be seen that the control timing of this soft-error-tolerant scan chain flip-flop is very complicated when scanning the test mode: four control clocks SCA, SCB, UPDATE and CAPTURE are required, and the rising edge sequence of these clocks needs to be carefully design

This is very bad for ATE testing

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