Bi-polycrystal SOI (Silicon On Insulator) Bi CMOS (Complementary Metal Oxide Semiconductor) integrated device with SiGe clip-shaped channel and preparation method thereof

Abstract

The invention discloses a bi-polycrystal SOI (Silicon On Insulator) Bi CMOS (Complementary Metal Oxide Semiconductor) integrated device with a SiGe clip-shaped channel and a preparation method of the device. The preparation method comprises the steps of conducting epitaxy on a collector region of a bipolar device on an SOI substrate, preparing a deep-trench isolator, a base window and base polycrystal, conducting epitaxy on a SiGe base region and a Poly-Si emitter region to form a SiGe HBT (Heterojuntion Bipolar Transistor) device; conducting photoetching on an active region of an NMOS (N-Channel Metal Oxide Semiconductor) device, growing five layers of materials on the region in an epitaxial manner to form the active region of the NMOS device so as to prepare an NMOS device; conducting photoetching on an active region of a PMOS (P-Channel Metal Oxide Semiconductor) device, growing three layers of materials in an epitaxial manner in the region to form the active region of the PMOS device, preparing a virtual grid electrode, and injecting by utilizing a self alignment process so as to form the drain electrode and the source electrode of the PMOS device; etching a virtual grid to prepare the PMOS device, and thus forming the Bi CMOS integrated with a conducting channel being 22-45nm and a circuit of an MOS (Metal Oxide Semiconductor) device, wherein the device and the circuit are based on the self alignment process. According to the preparation method, the self alignment process is adopted, and the characteristic of the anisotropism of the mobility ratio of strain SiGe material is utilized sufficiently, so that a bi-polycrystal SOI strain Bi COMOS integrated circuit with SiGe clip-shaped channel is prepared, and the performance of the circuit is enhanced.

Description

Technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits, and in particular relates to a dual polycrystalline SOI strained SiGe back-channel BiCMOS integrated device and a preparation method. Background technique [0002] Semiconductor integrated circuits are the foundation of the electronics industry, and people's huge demand for the electronics industry promotes the rapid development of this field. In the past few decades, the rapid development of the electronics industry has had a huge impact on social development and the national economy. At present, the electronics industry has become the world's largest industry, occupying a large share of the global market, and its output value has exceeded US$1,000 billion. [0003] Si CMOS integrated circuits have the advantages of low power consumption, high integration, low noise and high reliability, and occupy a dominant position in the semiconductor integrated circuit industry. However...

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Problems solved by technology

[0005] As the feature size of the device enters the sub-50nm stage, many difficulties are encountered in the research process of the strained Si / SiGe CMOS planar structure: short channel effects, hot carrier effects, etc. make the device size unable to be further reduced; gate oxidation The thinning of the layer thickness leads to the breakdown of the oxide layer, and the tunneling current causes the threshold voltage to drift; the polysilicon depletion effect and the resistance of the polysilicon have an increasing influence on the threshold voltage, etc., all of which make the device and circuit performance unable to continue according to Moore. As the law of development continues to develop, it becomes more important to study devices with new structures.

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