Processing method of double-mask heavy boron-doped silicon on insulator (SOI) micro electro mechanical system (MEMS)

Abstract

The invention provides a processing method of a double-mask heavy boron-doped silicon on insulator (SOI) micro electro mechanical system (MEMS), which belongs to the field of MEMS micro-processing. An SOI wafer comprises a silicon structural layer, a silicon substrate layer and an insulation layer arranged between the silicon structural layer and the silicon substrate layer. The processing method includes that a thin line width structure portion on an etching structural layer is first etched by using double masks, and a wide thin line width structure on the etching structural layer is then etched simultaneously, so that time for the wide thin line width structure to be etched on the insulation layer is basically same; then heavy boron doping is conducted on the surface of the silicon structural layer; and finally the insulation layer below the structural layer is removed, anisotropic etching is used for etching a silicon substrate below the structural layer, and a microstructure is released. The processing method can use an SOI material to manufacture various MEMS devices and has the advantages of being good in controllability of structural layer thickness, reducing footing effect and parasitic capacitance, being simple in processing flow and the like.

Description

technical field [0001] The present invention relates to the technical field of micro-machining of micro-electromechanical systems, in particular to a micro-electromechanical system (MEMS) processing method for silicon on insulator (Silicon on insulator, SOI) with double-mask concentrated boron doping. Processing technology research. Background technique [0002] In recent years, SOI technology has made great progress, and its application in the MEMS field has the following advantages: the monocrystalline silicon structure layer has excellent mechanical properties; the SiO2 buried oxide layer as a sacrificial layer and insulating layer has excellent corrosion stop capability, In MEMS processing, it is easy to obtain a complete, defect-free, uniform thickness and precisely controlled structural layer; the thickness of the structural layer can be increased; the all-silicon structure is compatible with the CMOS process and can be integrated with denser circuits. Therefore, comp...

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Problems solved by technology

[0003] However, the main problems faced by the current SOI MEMS processing technology are: the increase of the parasitic capacitance of the all-silicon structure; the Footing effect of SOI in DRIE, etc.

In order to overcome these problems, research on SOI MEMS processing technology is being carried out extensively at home and abroad, but the existing processing methods can only reduce the parasitic capacitance, or can only reduce the Footing effect. Therefore, it is necessary to develop a method that can reduce the parasitic capacitance. A processing method that can improve the Footing effect

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