Method for forming salicide block layer
A metal silicide, barrier layer technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of increased PMOS threshold voltage, uneven threshold voltage, etc., to reduce impact, improve uniformity, high Effect of Extinction Coefficient
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[0026] The present invention will be further detailed below in conjunction with the accompanying drawings:
[0027] In the following description, many specific details are explained in order to fully understand the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar popularizations without violating the connotation of the present invention. Therefore, the present invention is not limited by the specific implementation disclosed below.
[0028] Secondly, the present invention uses schematic diagrams for detailed description. When describing the embodiments of the present invention in detail, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, which should not be limited here. The scope of protection of the present invention. In addition, the three-dimensio...
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