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Method for forming shallow trench isolation (STI) structure used for flash memory

A technology of flash memory and isolation structure, which is applied in the manufacture of semiconductor/solid-state devices, electrical components, circuits, etc., can solve the problems of uneven thickness of polysilicon layer, and achieve the advantages of improving uniformity, increasing memory window, and fast deposition speed Effect

Active Publication Date: 2011-09-14
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
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  • Application Information

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Problems solved by technology

However, the thickness of the polysilicon layer formed by the above method is not uniform

Method used

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  • Method for forming shallow trench isolation (STI) structure used for flash memory
  • Method for forming shallow trench isolation (STI) structure used for flash memory
  • Method for forming shallow trench isolation (STI) structure used for flash memory

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Embodiment Construction

[0031] It can be seen from the background technology that the “smiley face” problem of the floating gate tunneling oxide caused by the formation of the shallow trench isolation pad oxygen layer in the existing flash memory reduces the coupling coefficient of the control gate and the source and drain to the floating gate, so that The programming and erasing efficiency of the device is reduced, and the read current of the device after erasing is reduced, and the working window of the storage device is reduced. The inventors of the present invention have studied the above problems and found that by changing the formation method of the isolation structure between adjacent flash memory cells in the flash memory, the read current of the flash memory can be reduced, and the efficiency of writing and erasing can be improved.

[0032] The inventor has conducted research on the above-mentioned problems, and believes that in the existing method for forming the isolation structure between ...

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Abstract

The invention provides a method for forming a shallow trench isolation (STI) structure used for improving the 'smiling face' effect of a flash memory. The method comprises the following steps: providing a semiconductor substrate, wherein a tunneling oxidization layer and a floating gate polycrystalline silicon layer are sequentially formed on the surface of the semiconductor substrate; forming a hard mask layer on the surface of the floating gate polycrystalline silicon layer, sequentially etching the hard mask layer, the floating gate polycrystalline silicon layer, the tunneling oxidization layer and the semiconductor substrate, and forming a shallow trench in the semiconductor substrate; adopting in-situ steam generation process to form a liner oxidization layer covering the surface of the shallow trench; and adopting chemical vapor deposition to form an isolation medium layer filling the shallow trench. Through the STI structure forming method for the flash memory, the smiling face problem of the floating gate tunneling oxide caused by the traditional process can be effectively solved, the programming and erasure efficiency of the flash memory can be improved, and the read current of the flash memory in an erasure state can be increased, thus achieving the purpose of increasing a memory window.

Description

technical field [0001] The invention relates to a method for forming a shallow trench isolation structure, in particular to a method for forming a shallow trench isolation structure for a flash memory. Background technique [0002] In the current semiconductor industry, integrated circuit products can be mainly divided into three types: logic, memory and analog circuits, among which memory devices account for a considerable proportion of integrated circuit products. Among storage devices, the development of flash memory (flash memory) is particularly rapid in recent years. Its main feature is that it can keep stored information for a long time without power on, and has many advantages such as high integration, fast access speed, easy erasure and rewriting, etc. The field has been widely used. [0003] The standard physical structure of flash memory is called a flash cell (bit). The structure of the flash memory cell is different from that of conventional MOS transistors. ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/762
Inventor 曹子贵张雄张博于世瑞孔蔚然顾靖胡剑
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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