Precise Alignment and Decal Bonding of a Pattern of Solder Preforms to a Surface

Abstract

A method of making precise alignment and decal bonding of a pattern of solder preforms to a surface comprising cutting and placing a length of a solder ribbon onto a semiconductor release tape forming a solder ribbon and semiconductor release tape combination, placing the solder ribbon and semiconductor release tape combination on a vacuum chuck on X-Y stage pair in a laser micromachining system, adjusting the working distance, laser-cutting an outline, peeling off the solder ribbon, allowing the desired solder shape to remain, creating indexing holes, providing a target surface on an alignment fixture with indexing pins, aligning the indexing holes, placing the semiconductor release tape with the desired solder shape on the target surface, pressing the desired solder shape onto the target surface, removing the release tape, and making a pattern of the desired solder shape with precise alignment and decal bonding on the target surface.

Description

REFERENCE TO RELATED APPLICATION[0001]This application is a non-provisional of, and claims priority to and the benefits of, U.S. Provisional Patent Application No. 62 / 598,541 filed on Dec. 14, 2017 and U.S. Provisional Patent Application No. 62 / 598,539 filed on Dec. 14, 2017 and U.S. Provisional Patent Application No. 62 / 728,650 filed on Sep. 07, 2018, the entireties of each are hereby incorporated by reference.BACKGROUND[0002]This disclosure concerns precise alignment and decal bonding of a pattern of solder preforms to a surface. The terms ‘surface’ and ‘sample’, ‘receiving’ and ‘target’ will be used interchangeably in this invention.[0003]With the increasing density and complexity of circuitry in modern microelectronics, there is a need to apply solder for attaching components in small precise amounts with tight spatial tolerances.[0004]Solder preforms are precisely formed elements of solder available commercially in various sizes, shapes, thickness and compositions (with or with...

AI Technical Summary

Benefits of technology

[0017]This new process described herein is an efficient and scalable method for bonding electrical circuit patterns at specific locations between an upper and lower surface. The pattern of solder preforms is fabricated on a release tape and has indexed alignment holes at prescribed locations. This indexed tape design allows simple integration into a reel-to-reel system for commercial applications. This method is especially applicable to solder bonding the overlay of filaments from upper and lower high-temperature superconducting (HTS) tapes. This method can also be generalized to allow parallel solder bonding of microscopic features at precise locations between any two overlaid adjacent surfaces.

[0026]The keys to ensuring high placement accuracy of the solder pattern onto a receiving surface are: 1) to fabricate indexing holes in both the release tape containing the solder preforms and the receiving surface(s) and 2) to fabricate the ‘complementary’ indexing pins on an alignment jig. The alignment jig is a device or structure that helps align and assemble all the separate components together on a 2-D planar or 3-D curved surface with high precision. With judicious choice of indexing holes and pins, individual components are aligned to less than 50 microns spatial tolerance. Other methods of indexing components such as mechanical means (e.g. notches, holes, guides) or optical means (e.g. laser, LED, lamp) can be used. As long as there is a ‘complementary’ structure on the alignment jig to match the indexed component, then high spatial accuracy can be maintained.

Problems solved by technology

Manual placement is slow and pick-and-place systems cannot handle very small and fragile components (limited to a few hundred microns thickness).

Although high-speed multiple-head pick-and-place machines exist, the increasing complexity and density of circuitry require ever decreasing solder preform size with wider variety, demands that go beyond the capabilities of current pick-and-place machines.

Ultimately, both prior art methods place the solder preforms in their final locations in a serial manner which limits their processing speeds.

Although both these prior art methods can process solder preforms simultaneously, they cannot be easily implemented in a roll-to-roll environment used for manufacturing tapes.

One problem associated with stamping is the curvature of the surface of the preform caused by the forces acting on it during the stamping process.

The curved surface may reduce the seal between the preform and the vacuum nozzle in an SMT machine resulting in less reliable pick-up and release of the preform.

However the solder preforms were cut individually and not aligned to any pre-defined pattern in a receiving surface.

In these prior art techniques, the shape and size of each solder preform is usually fixed for the entire receiving pattern and not easily changed without redesigning and refabricating the recessed holder.

Irregularly shaped and very thin (<0.25 mm) solder preforms that may be required for highly specialized applications may not be easily handled by current techniques.

Very thin (<0.2 mm thick) and low mass solder preforms are required for fine electronics circuitry (such as high-temperature superconducting (HTS) tapes or foils) and placing them on a receiving sample with high precision (

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