Bipolar Transistor with Pseudo Buried Layers

Abstract

A structure and fabrication method for a bipolar transistor with shallow trench isolation (STI) comprises a collector formed by implanting first electric type impurity in active area; pseudo buried layers at the bottom of STI at both sides of active area by implanting heavy dose of first electric type impurity; deep contacts through field oxide to connect to pseudo buried layers and to pick up the collector; a base, a thin film deposited on the collector and doped with second electric type impurity; an emitter, a polysilicon film doped by heavy dose implant of first electric type impurity. This transistor has smaller device area, less parasitic effect, less photo layers and lower process cost.

Description

[0001]The current application claims a foreign priority to an application in China with a serial number 200910202011.7 filed on Dec. 21, 2009.FIELD OF THE INVENTION[0002]This invention relates generally to semiconductor devices in integrated circuits. More particularly it relates to bipolar transistor design and fabrication.BACKGROUND OF THE INVENTION[0003]In radio frequency (RF) applications, higher and higher cut-off frequency (Ft) of RF transistor is required. RFCMOS with advanced technology nodes can realize high cut-off frequency. However RFCMOS still cannot satisfy RF requirement ((Ft higher than 40 GHz), and further more, advanced CMOS process is quite expensive. The compound semiconductor devices can achieve very high Ft, while their expensive materials, small size substrate and material poisonousness limit their applications. Silicon bipolar junction transistor (BJT) and SiGe hetrojunction bipolar transistor (HBT) are the best options of high Ft devices.[0004]NPN transistor...

AI Technical Summary

Benefits of technology

[0006]It is therefore an object of the present invention to offer a bipolar transistor with smaller device size, less parasitic effect, fewer photo mask layers and lower process cost.

[0010]The invention of bipolar transistor omits conventional collector buried layer process, collector epitaxial growth and heavily doped collector pick-up. Instead the pseudo buried layers implanted at the bottoms of shallow trenches are taken as buried layers, the collector area is formed by implantations, and the deep trench contacts in field oxide are used for collector pick-up. Compared to conventional bipolar transistors, the bipolar transistor in present invention has smaller device size, less parasitic effect, fewer photo mask layers and lower process cost.

Problems solved by technology

However RFCMOS still cannot satisfy RF requirement ((Ft higher than 40 GHz), and further more, advanced CMOS process is quite expensive.

The compound semiconductor devices can achieve very high Ft, while their expensive materials, small size substrate and material poisonousness limit their applications.

However it has some disadvantages: 1. too expensive for collector epitaxy; 2. Collector pick-up is formed by high dose, high energy implant.

Its occupied area is large; 3. Deep trench isolation process is complicated and expensive; 4. There are too many photo mask layer to fabricate transistors.

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