Three-dimensional LADAR module with alignment reference insert circuitry comprising high density interconnect structure

Abstract

A 3-D LADAR imaging system incorporating stacked microelectronic layers is provided. A light source such as a laser is imaged upon a target through beam shaping optics. Photons reflected from the target are collected and imaged upon a detector array through collection optics. The detector array signals are fed into a multilayer processing module wherein each layer includes detector signal processing circuitry. The detector array signals are amplified, compared to a user-defined threshold, digitized and fed into a high speed FIFO shift register range bin. Dependant on the value of the digit contained in the bins in the register, and the digit's bin location, the time of a photon reflection from a target surface can be determined. A T₀ trigger signal defines the reflection time represented at each bin location by resetting appropriate circuitry to begin processing.

A reference insert circuit inserts data into the FIFO registers at a preselected location to provide a reference point at which all FIFO shift register data may be aligned to accommodate for timing differences between layers and channels. The bin data representing the photon reflections from the various target surfaces are read out of the FIFO and processed using appropriate circuitry such as a field programmable gate array to create a synchronized 3-D point cloud for creating a 3-D target image.

A preferred embodiment comprises the use of compressible conductors such as Fuzz Buttons to interconnect one or more of the layers to an external circuit.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application is a continuation in part of application Ser. No. 11 / 499,403 entitled “High Density Interconnect Assembly Comprising Stacked Electronic Module” filed Aug. 4, 2006, which in turn is related to U.S. provisional patent application No. 60 / 711,375 entitled “High Density Interconnect Scheme For Stacked Electronic Modules” filed Aug. 26, 2005, each of which is incorporated herein by reference and to which priority is claimed pursuant to 35 U.S.C. 119.[0002]This application is a continuation in part of application Ser. No. 11 / 706,724 entitled “Three Dimensional LADAR Module with Alignment Reference Circuitry” filed Feb. 15, 2007, now allowed, which application claims the benefit of U.S. provisional patent application No. 60 / 785,135, filed on Mar. 24, 2006, entitled, “Method for Image Jitter Reduction in a Multilayer LADAR Device” and which is a continuation-in-part of U.S. patent application Ser. No. 10 / 806,037 filed on Mar. 22, ...

AI Technical Summary

Benefits of technology

[0017]In yet a further aspect of the invention, one or more alignment reference points are inserted at a predetermined point in the image capture cycle to allow the electronic alignment of selected sets of image data collected by the FIFO shift registers in the one or more channels of the one or more ROICs contained in the processing module. In this aspect of the invention, alignment reference point insertion and alignment circuitry is provided as means to minimize layer-to-layer or channel-to-channel “jitter” which may be present due to variances in layer operating or data capture start-up characteristics. Alternatively, the invention allows a user to selectively insert an alignment reference p...

Problems solved by technology

Unfortunately, existing LADAR imaging systems lack the necessary circuit speed and capacity to achieve very high (i.e., centimeter) range resolution and sensitivity.

Nonetheless, these types o...

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