Method for reducing wafer harm caused by shallow slot insulation chemical mechanical polishing technique

Abstract

The invention offers the method used to reduce wafer damage caused by shallow ridges insulating chemico-mechanical polishing technology. It includes the following steps: offering a wafer includes integrate circuit crystal area, cutting way, and laser number graving area; forming active area photoresist pattern includes trench opening and nominal opening; etching bedding and substrate to form isolating shallow ridge and nominal shallow ridge; depositing trench filler material and filling the isolating and nominal shallow ridges; chemico-mechanical polishing until the bedding.

Description

technical field [0001] The invention relates to the field of semiconductor technology, in particular to a semiconductor technology method capable of reducing wafer damage caused by a shallow trench insulation chemical mechanical polishing process, thereby improving yield. Background technique [0002] As is well known to those skilled in the art, semiconductor integrated circuits are made on the surface of semiconductor wafers such as monocrystalline silicon wafers, and the surface of the wafer is usually divided into different crystal square areas by partitions, and each crystal square area is divided into Semiconductor processes such as photolithography and etching technology form components and circuits, and then form a single chip after testing, dicing and packaging. In semiconductor processes, such as thermal oxidation process or cleaning process, sometimes multiple wafers can be processed at the same time, also known as batch wafer processing, while in some process ste...

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Problems solved by technology

[0011] The main purpose of the present invention is to provide an improved manufacturing method of semiconductor integrated circuits to solve the problems of the above-mentioned prior art

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