Semiconductor integrated circuit device and method for designing the same

A technology of integrated circuits and design methods, applied in the direction of semiconductor devices, circuits, semiconductor/solid-state device components, etc., can solve the problems of voltage reduction, difficulty in reducing power consumption of semiconductor integrated circuit devices, and difficulty in high-speed operation of semiconductor integrated circuit devices. , to achieve the effect of low power consumption design

Inactive Publication Date: 2004-06-02
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, in the above-mentioned prior art, it is difficult to further reduce power consumption of the semiconductor integrated circuit device because control is performed for each circuit block.
[0006] In addition, with the miniaturization of components in semiconductor integrated circuit devices, voltage drops due to IR-Drop effects, etc., will cause difficulties in realizing high-speed operation of semiconductor integrated circuit devices.

Method used

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  • Semiconductor integrated circuit device and method for designing the same
  • Semiconductor integrated circuit device and method for designing the same
  • Semiconductor integrated circuit device and method for designing the same

Examples

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no. 1 Embodiment approach

[0092] figure 1 A configuration example of the semiconductor integrated circuit device according to the first embodiment of the present invention is shown. exist figure 1In the shown semiconductor integrated circuit device, a circuit block 1C and power supplies 11 to 14 are shown.

[0093] The circuit block 1C has elements (hereinafter referred to as "components") 101e to 120e constituting the block 1C, and to the components 101e to 120e, any one of voltages VDD1 to VDD4 is supplied from power sources 11 to 14 (the Thick solid line). In addition, in figure 1 Here, the constituent elements 101e to 120e are connected by vias as shown in the figure. In addition, here, a circuit block refers to a block including a circuit of constituent elements such as an AND gate and an OR gate, for example.

[0094] The voltages VDD2 to VDD4 supplied to the circuit block 1C are voltages stepped down by a certain ratio based on the rated voltage VDD1 of the semiconductor integrated circuit ...

no. 2 Embodiment approach

[0104] Hereinafter, in the second embodiment, as one of the methods for reducing power consumption by supplying individual power supply voltages to each component constituting the circuit block, a method is performed in a region determined in units of voltage (hereinafter referred to as The method of arranging each component in the arrangement area) will be described.

[0105] image 3 A configuration example of the semiconductor integrated circuit device according to the second embodiment of the present invention is shown.

[0106] Such as image 3 As shown, a layout region 31R and a layout region 32R are provided in the circuit block 3C, the voltage VDD1 from the power supply 11 is supplied to the layout region 31R, and the voltage VDD2 from the power supply 12 is supplied to the layout region 32R. Moreover, the component elements 301e-306e belonging to the route 34p are included in the layout area 31R, and the component elements 307e-309e belonging to the route 36p are in...

no. 3 Embodiment approach

[0115] Hereinafter, in the third embodiment, a method for realizing low power consumption in consideration of a voltage drop due to the IR-Drop effect will be described.

[0116] Figure 5 Shown is a configuration example of a semiconductor integrated circuit device according to a third embodiment of the present invention. As an example of the layout region described in the second embodiment, the voltage drop caused by the IR-Drop effect or the like occurring inside the layout region is considered. The configuration diagram of the interior of the configuration area.

[0117] Such as Figure 5 As shown, the power supply line 51L supplying the voltage VDD51 is arranged in the center of the arrangement region 50R, and a voltage drop due to the IR-Drop effect or the like occurs in the arrangement region 50R. For example, if the lower half of the configuration region 50R is used for illustration, the region with the shortest distance from the power supply wiring 51L is the region...

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PUM

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Abstract

Provided is a semiconductor integrated circuit device which enables reduction is power consumption. The semiconductor integrated circuit device has a circuit block 1C including a plurality of components 101e to 120e, and a voltage of a value different from those of other components is supplied to at least one of the plurality of components 101e to 120e from electric sources 11 to 14 which supply voltages VDD1 to VDD4.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit device and a design method of the semiconductor integrated circuit device. Background technique [0002] With the increase in performance and scale of semiconductor integrated circuit devices, an increase in power consumption has become a problem. In particular, semiconductor integrated circuit devices used in the field of mobile communications operate with limited power, so reducing power consumption is an important issue. [0003] As one method of reducing power consumption of a semiconductor integrated circuit device, there is a technique of controlling one voltage supplied to circuit blocks constituting the semiconductor integrated circuit device. In this technique, for each circuit module, the power supply voltage supplied to the circuit module is reduced to a certain value, or the supply of the power supply voltage is cut off. Thus, the power consumption of the semiconductor integrated...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/528
CPCH01L23/5286H01L24/06H01L2224/05554H01L2924/14H01L2924/00
Inventor 西川亮太岛村秋光
Owner PANASONIC CORP
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