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Etching solution and manufacturing method of array substrate using etching solution

An etching solution and etching technology, which is applied in the production of array substrates and in the field of etching solution, can solve the problems of electrode short circuit, electric arc, molybdenum residue, etc., and achieve the effects of moderate etching rate, low cost and long life

Pending Publication Date: 2022-02-25
TCL CHINA STAR OPTOELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Under this condition, the etching time of the etchant to the copper / molybdenum film layer will be reduced, so it is easy to cause molybdenum residues, and the existence of molybdenum residues will easily cause problems such as short circuits between electrodes or arcs. Etching the source and drain layers and the semiconductor layer at the same time has become a major problem in the array substrate manufacturing process.

Method used

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  • Etching solution and manufacturing method of array substrate using etching solution
  • Etching solution and manufacturing method of array substrate using etching solution
  • Etching solution and manufacturing method of array substrate using etching solution

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Embodiment Construction

[0019] The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts belong to the scope of protection of this application. In addition, it should be understood that the specific implementations described here are only used to illustrate and explain the present application, and are not intended to limit the present application. In this application, unless stated otherwise, the used orientation words such as "up" and "down" generally refer to up and down in the actual use or working state of the device.

[0020] Embodiments of the present application provide an etching solution and a method for manufacturing an array s...

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Abstract

The invention discloses an etching solution and a manufacturing method of an array substrate using the etching solution. The etching solution comprises the following components in percentage by mass: 10 to 20% of hydrogen peroxide, 0.05 to 5% of an etching inhibitor, 0.1 to 2% of a fluoride composition, 0.5 to 5% of a silicon etching aid, 2 to 10% of an etching additive, and a solvent. The etching solution has excellent etching performance on copper / molybdenum, copper / titanium or copper / molybdenum titanium metal layers of source and drain electrode layers, is low in cost, and can etch a semiconductor layer and reduce metal residues while keeping long service life of a device, so that problems caused by a subsequent dry etching process are reduced, even the dry etching process of the semiconductor layer can be directly omitted, the manufacturing cost is reduced, and the device stability is improved.

Description

【Technical field】 [0001] The present application relates to the field of etching, in particular to an etching solution and a method for manufacturing an array substrate using the etching solution. 【Background technique】 [0002] In a high-generation liquid crystal display (thin-film transistor, TFT), there are generally five layers on the array substrate, which are a gate layer, a semiconductor layer, a source-drain layer, a passivation layer, and a pixel electrode layer. In the conventional array substrate manufacturing process, each layer of film will go through major steps such as film formation, coating, exposure, etching, and photoresist removal to form a specific wiring pattern. Among them, the gate layer, the source-drain layer and the indium tin oxide layer are metal / metal oxide, which are usually wet-etched by etching solution, while the semiconductor layer and passivation layer are usually dry-etched by plasma. During the etching process of the source and drain la...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): C23F1/18C23F1/26C23F1/24C09K13/08C09K13/10H01L21/77H01L21/306H01L21/3213
CPCC23F1/18C23F1/26C23F1/02C09K13/08C09K13/10H01L27/1259H01L21/30604H01L21/32134
Inventor 何毅烽
Owner TCL CHINA STAR OPTOELECTRONICS TECH CO LTD
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