Method for manufacturing GaP rough surface of GaAs-based LED wafer
A production method and rough surface technology, which is applied in the field of semiconductor processing optoelectronics, can solve the problems of difficult control of corrosion rate and uniformity of corrosion, large limitation of brightness improvement, large difference of brightness between regions, etc., to achieve easy control and light extraction efficiency Enhanced, high usability effects
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Embodiment 1
[0062] S1: Epitaxial layer 1 growth: Prepare the epitaxial layer 1 growth material, and check the operation of each device; then take the GaAs substrate 7, and grow a buffer layer and an N-type gallium arsenide layer on the GaAs substrate 7 from bottom to top in sequence , DBR layer, N-type confinement layer, MQW quantum well layer, P-type confinement layer, P-type GaP, GaP window layer, to obtain the epitaxial layer 1 of the wafer;
[0063] S2: Preparation of P-electrode protective layer 2: take the prepared wafer with epitaxial layer 1, grow a silicon dioxide layer on the GaP window layer, perform photolithography, and wet-etch away the silicon dioxide layer outside the P-face electrode 5 area , to obtain the P electrode protective layer 2; wherein the thickness of the silicon dioxide layer is The growth temperature is 200°C;
[0064] S3: Prepare corrosion sol; take photoresist, roughening etchant and surfactant, and mix them uniformly in proportion to prepare corrosion so...
Embodiment 2
[0071] S1: Epitaxial layer 1 growth: Prepare the epitaxial layer 1 growth material, and check the operation of each device; then take the GaAs substrate 7, and grow a buffer layer and an N-type gallium arsenide layer on the GaAs substrate 7 from bottom to top in sequence , DBR layer, N-type confinement layer, MQW quantum well layer, P-type confinement layer, P-type GaP, GaP window layer, to obtain the epitaxial layer 1 of the wafer;
[0072] S2: Preparation of P-electrode protective layer 2: take the prepared wafer with epitaxial layer 1, grow a silicon dioxide layer on the GaP window layer, perform photolithography, and wet-etch away the silicon dioxide layer outside the P-face electrode 5 area , to obtain the P electrode protective layer 2; wherein the thickness of the silicon dioxide layer is The growth temperature is 225°C;
[0073] S3: Preparation of corrosion sol; take photoresist, roughening corrosion solution and surfactant, and mix them uniformly in proportion to pr...
Embodiment 3
[0080] S1: Epitaxial layer 1 growth: Prepare the epitaxial layer 1 growth material, and check the operation of each device; then take the GaAs substrate 7, and grow a buffer layer and an N-type gallium arsenide layer on the GaAs substrate 7 from bottom to top in sequence , DBR layer, N-type confinement layer, MQW quantum well layer, P-type confinement layer, P-type GaP, GaP window layer, to obtain the epitaxial layer 1 of the wafer;
[0081] S2: Preparation of P-electrode protective layer 2: take the prepared wafer with epitaxial layer 1, grow a silicon dioxide layer on the GaP window layer, perform photolithography, and wet-etch away the silicon dioxide layer outside the P-face electrode 5 area , to obtain the P electrode protective layer 2; wherein the thickness of the silicon dioxide layer is The growth temperature is 250°C;
[0082] S3: Preparation of corrosion sol; take photoresist, roughening corrosion solution and surfactant, and mix them uniformly in proportion to pr...
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