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Full memristor neural network and preparation method and application thereof

A neural network and memristor technology, applied in the field of semiconductors and new computing, can solve the problems of restricting network scalability, stackability and energy efficiency, and achieve the effect of high integration and scalability

Active Publication Date: 2020-06-12
PEKING UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in all of these artificial neural networks, the signal processing functions are implemented either by CMOS circuits (on the order of 10 transistors or more) or by software running on a processor to simulate neurons, which limits the scalability of the network , stackability and further improvements in energy efficiency
At present, there are still work reports on a fully neuromorphic device network combining synapses and neurons, which has both synaptic weight learning and neuron signal processing. Therefore, it is urgent to develop a fully neuromorphic device with high integration and scalability. device network

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  • Full memristor neural network and preparation method and application thereof
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  • Full memristor neural network and preparation method and application thereof

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Embodiment Construction

[0044] Below in conjunction with accompanying drawing, through concrete example, further illustrate the present invention, but does not limit the present invention in any way.

[0045] Such as Figure 6 As shown, the full memristor neural network of this embodiment includes: a substrate 1, a bottom electrode 2, a first functional layer 3, an intermediate electrode 4, a second functional layer 5 and a top electrode 6; wherein, on the substrate 1 The pattern of the first electrode 2 is defined, and the bottom electrode 2, the first functional layer 3 and the middle electrode 4 are sequentially formed on the substrate to form a MIM nano-stack structure as a memristive synaptic device; the substrate 1 and the MIM nano-stack The second functional layer 5 is covered on the stack structure, and the top electrode 6 is covered on the second functional layer to form a memristive neuron device, thereby constructing a full memristor neural network.

[0046] The preparation method of the ...

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Abstract

The invention discloses a full memristor neural network and a preparation method and application thereof. The full memristor neural network forms a memristor synaptic device through a bottom electrode, a first functional layer and an intermediate electrode, then a second functional layer covers the memristor synaptic device, and a top electrode covers the second functional layer to form a memristor neural component, so that the full memristor neural network is constructed. By changing the weight of the synaptic device, the full memristor neural network can realize the functions of pattern recognition, supervised learning and the like. The full-memristor neural network has high integration level and miniaturization, is compatible with a traditional silicon-based CMOS process, is suitable for large-scale production, and has important significance for finally realizing large-scale brain-like computing hardware in the future.

Description

technical field [0001] The invention relates to the technical fields of semiconductors and new computing, in particular to a full memristor neural network suitable for brain-inspired computing and its preparation method and application. Background technique [0002] Due to the use of separate storage and computing units, traditional computers face multiple challenges such as performance and power consumption. With the rapid development of the semiconductor industry, the traditional von Neumann computing architecture can no longer meet the demand for higher computing power and lower power consumption, and it is urgent to develop a disruptive computing architecture. Inspired by the structure and principles of the human brain, neuromorphic computing has great potential in the next generation of computing technology, with large-scale parallelism and high efficiency, thereby overcoming the bottleneck of the von Neumann structure and finally achieving the level of human intelligen...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/06G06N3/063G06N3/08H01L45/00
CPCG06N3/061G06N3/063G06N3/08H10N70/20H10N70/801H10N70/011
Inventor 杨玉超段庆熙荆兆坤黄如
Owner PEKING UNIV
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