FPGA circuit layout and resource allocation method based on webpage ranking algorithm

Abstract

The invention provides an FPGA circuit layout and resource allocation method based on a webpage ranking algorithm. The method comprises the following steps: 1) constructing a basic unit influence factor sparse matrix M in an FPGA circuit; 2) obtaining a key value vector through iterative optimization; and 3) dividing basic units according to the key value vector, and compiling a layout constraintfile. Compared with the prior art, the method has the advantages that fine-grained circuit resource allocation is carried out on the large-scale FPGA, the layout of the whole system is optimized, andwaste of wiring resources can be effectively reduced; important circuit units on a high fan-out critical path are reasonably arranged, circuit delay increase caused by unreasonable wiring and resourceallocation is reduced, and the time sequence performance of the system is improved; a webpage search algorithm is used for circuit analysis modeling, the FPGA circuit design and development speed isincreased, and development cycle iteration caused by circuit implementation difficulty is reduced.

Description

technical field [0001] The invention belongs to the technical field of programmable circuit design, in particular to an FPGA circuit layout and resource allocation method based on a web page ranking algorithm. Background technique [0002] As a semi-custom circuit in the field of integrated circuit technology, FPGA (Field-Programmable Gate Array) circuit can quickly and flexibly build a circuit system, filling in the shortcomings of long custom circuit development cycle and solid application scenarios. Generally speaking, FPGA circuits are generally composed of resources such as IO units, programmable logic units, storage units, global clock units, and IP controllers. Through the cascading and combination of the above various units, the circuit programmable customization function can be realized. [0003] With the increasing complexity of the current system, the internal resources of the single-chip FPGA circuit are increasingly unable to meet the design requirements. In o...

AI Technical Summary

Problems solved by technology

However, the design scale of the current FPGA circuit generally reaches the scale of tens of millions of circuit gates, which cannot be realized by using the traditional artificial division method.

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