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Discharge rate dependent plasticity structure and implementation method

A technology of discharge rate and implementation method, which is applied in the field of neural network and brain-like computing, can solve problems such as not providing circuit structure solutions, and achieve the effect of plasticity

Inactive Publication Date: 2020-02-07
BEIJING INFORMATION SCI & TECH UNIV
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Problems solved by technology

[0004] However, in the prior art, it mainly simulates whether it has the characteristics of SRDP learning rules for different devices and methods, and does not provide a solution to the circuit structure

Method used

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  • Discharge rate dependent plasticity structure and implementation method

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Embodiment Construction

[0019] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention.

[0020] Such as figure 1 As shown, the firing rate depends on plastic structures, including presynaptic neuron PRE, postsynaptic neuron POST, and SRDP electronic synapse, which includes four MOS transistors and a top electrode with TE (V TE ) bipolar switch RRAM; wherein the four MOS transistors are represented by symbols as M1, M2, M3, M4 respectively, the M1 and M2 form a group to form the M1 / M2 branch, and the M3 and M4 form a group M3 / M4 branches, the M1 / M2 is connected in parallel with M3 / M4; the presynaptic neuron PRE is connected to M1 and M3 respectively through two circuits, and the presynaptic neuron PRE is connected to M2 through a delay circuit; M1 / M2, M3...

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Abstract

The invention provides a discharge rate dependent plasticity structure and an implementation method, the discharge rate dependent plasticity structure comprises a pre-synaptic neuron PRE, a post-synaptic neuron POST and an SRDP electronic synapse, and the SRDP electronic synapse comprises four MOS transistors and a bipolar switch RRAM; wherein the four MOS transistors are respectively representedas M1, M2, M3 and M4 by using symbols, M1 and M2 form a group to form M1 / M2 branches, M3 and M4 form a group to form M3 / M4 branches, and M1 / M2 and M3 / M4 are connected in parallel; and the M1 / M2, the M3 / M4, the post-synaptic neuron POST and the bipolar switch RRAM are mutually connected in series. According to the structure and the method, plasticity of discharge time can be realized; unsupervisedlearning can be demonstrated on the neural network level, and the feasibility of a hybrid CMOS / RRAM integrated circuit supporting human brain learning ability matching is proved.

Description

technical field [0001] The invention belongs to the field of neural network and brain-inspired computing, and in particular relates to a discharge rate-dependent plastic structure and a realization method. Background technique [0002] In hardware, simulating the cognitive processes of the brain is a major challenge for many fields. A key element of cognitive hardware systems is the ability to learn through biologically realistic plasticity rules combined with scalability to achieve high-density neuron / synaptic network. To this end, memristor (RRAM) devices have recently attracted intense interest as potential electronic synaptic elements. In neuromorphic circuits, neurons are connected by synapses and process information, often through event-driven firing activity. Firing both transmits information and induces plasticity in synapses that form the basis of learning. In memristors, the front and rear ends of the synapse can be represented as the upper and lower electrodes...

Claims

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Application Information

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IPC IPC(8): G06N3/063
CPCG06N3/063
Inventor 张丹妮张烨易军凯
Owner BEIJING INFORMATION SCI & TECH UNIV
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