Super junction device and manufacturing method thereof

Abstract

The invention discloses a super junction device, grooves of a super junction structure are of a lateral inclined structure, the doping concentration of N-type epitaxial layers are distributed in a stepped mode, and P-type columns are formed of a plurality of layers of P-type epitaxial layers which are filled in the grooves in an overlapped mode; and the doping concentration of the P-type epitaxiallayers of the P-type columns is decreased successively from bottoms to tops of the grooves. A protective epoxy film wraps around the circumferential side of a current flow region; and the N-type epitaxial layer at the interface of the protective epoxy film and the oxide film epitaxial layer of the N-type epitaxial layer of a terminal region internally comprises a top region with the reduced N-type doping concentration, and the top region can enhance the lateral depletion capacity of the N-type column at the interface of the oxide film epitaxial layer. The invention further discloses a manufacturing method of the super junction device. According to the super junction device, the charge balance between the P-type columns and N-type columns of the super junction structure with the inclined grooves can be improved, the longitudinal voltage endurance capability of the device is improved, and the source leakage breakdown voltage of the device is increased; and the lateral voltage bearing capacity of a device terminal can further be improved, and reliability of the device is improved.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a method for manufacturing a superjunction device. Background technique [0002] The super junction structure is composed of alternately arranged N-type pillars and P-type pillars. If the superjunction structure is used to replace the N-type drift region in the vertical double-diffused MOS transistor (Vertical Double-diffused Metal-Oxide-Semiconductor, VDMOS) device, the conduction path is provided through the N-type column in the conduction state, and when the conduction The P-type column does not provide a conduction path; in the off state, the PN column jointly bears the reverse bias voltage, forming a super-junction metal-oxide-semiconductor field-effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET). The super junction MOSFET can greatly reduce the on-resistance of the device by using a low-resistivity epitaxial layer w...

AI Technical Summary

Problems solved by technology

But the problem is that even if the N-type epitaxial layer is made into two layers, the concentration of the upper half is high and the concentration of the lower half is low, but in this way, there will still be significantly more N-type impurities than P-type impurities in the bottom area of ​​the trench. P-N balance, thus affecting BVds

Another problem is that due to the increase in the concentration of the N-type epitaxy at the top of the terminal region, the ability of the terminal region to withstand voltage laterally is reduced, resulting in device breakdown occurring in the terminal region, which not only fails to improve the effect of BVds, but also due to BVds Occurs at the terminal, making the consistency of BVds worse, and the EAS capability of the device is also worse

Images