Method for manufacturing MOS transistor with germanium silicon source and drain

Abstract

The invention discloses a method for manufacturing an MOS transistor with a germanium silicon source and drain. The method comprises steps that S1, a silicon substrate is provided, a gate structure isformed on a surface of the silicon substrate, and a side wall is formed on a side surface of the gate structure; and S2, a groove having the meandering shape is formed on two sides of the gate structure, including sub steps of S21, a hard mask layer is formed; S22, a formation region of the groove of the photolithography process is employed; S23, first dry etching is performed to form a first portion of the groove; S24, second cleaning process is performed, the cleaning solution adopts the combination of DHF and DIO3, the DHF is employed to remove contamination on the surface of the silicon substrate, the DIO3 is employed to control the etching rate of the oxide layer brought by the DHF, and S25, third wet etching is performed to form a final groove. The method is advantaged in that control of the cleaning process after the groove is dry can be realized, and loss of an oxide layer can be reduced or avoided while the contamination on the surface of the silicon substrate can be sufficiently removed.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a method for manufacturing a MOS transistor with silicon germanium source and drain. Background technique [0002] The source and drain regions of MOS transistors, especially PMOS transistors, often need to form an embedded silicon germanium epitaxial layer. The embedded silicon germanium epitaxial layer can modulate the stress of the channel region of the PMOS transistor, which is conducive to improving the carrier mobility of the PMOS. Therefore, the electrical performance of the PMOS tube is improved. However, the embedded silicon germanium epitaxial layer is introduced by first forming a groove in the silicon substrate, the groove usually has a Σ shape, and then filling the epitaxial layer in the groove to realize the embedding of the epitaxial layer into the silicon substrate. The etching process of the groove needs to use a hard mask layer, a...

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Problems solved by technology

[0003] In the existing methods, for the pollutants such as polymer or byproduct on the surface of high pollutants, the existing methods are to use acid tank (wet bench tool) or single wafer cleaning machine (single wafer) to add DHF to clean, but with As the line width shrinks, the overall loss (loss) of the silicon substrate caused by cleaning must also be taken into account. The loss caused by DHF is mainly the loss of the oxide layer, so it is extremely important to control the number of seconds of DHF cleaning , so there is a contradiction between the cleaning and removal of pollutants and the loss of the silicon substrate. If the cleaning time is too short, the pollutants cannot be completely removed, and the residue of pollutants will cause defects such as deforming the shape of the groove. If the cleaning time is too long, it will cause excessive loss to the oxide layer on the silicon substrate. When the line width of the device is reduced, this loss will have an adverse effect on the performance of the device

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