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Method and device for processing surface of tellurium zinc cadmium substrate and component

A substrate surface and processing method technology, which is applied in the field of cadmium zinc telluride substrate surface processing method and device, and can solve the problems of edge effect sagging and the like

Active Publication Date: 2019-03-26
11TH RES INST OF CHINA ELECTRONICS TECH GROUP CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The embodiment of the present invention provides a method and device for surface processing of a CdZnTe substrate, which is used to solve the problem of "sag edge" which occurs during the surface processing of large-area CdZnTe wafers in the prior art

Method used

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  • Method and device for processing surface of tellurium zinc cadmium substrate and component
  • Method and device for processing surface of tellurium zinc cadmium substrate and component
  • Method and device for processing surface of tellurium zinc cadmium substrate and component

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Embodiment Construction

[0039] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0040] The first embodiment of the present invention provides a method for processing the surface of a CdZnTe substrate, such as figure 1 shown, including the following specific steps:

[0041] Step S11, making a companion film;

[0042] In this step, the specific implementation process includes: obtaining the CdZnTe material with the same composition as the CdZnTe substrate as the companion material; calculating the size of the c...

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Abstract

The invention discloses a method and device for processing surface of a tellurium zinc cadmium substrate. The method comprises a step of preparing company sheets, a step of wrapping the edge of the tellurium zinc cadmium substrate with the sheets and bonding the sheet and the tellurium zinc cadmium substrate, and a step of polishing the surface of the tellurium zinc cadmium substrate to which thesheets are bonded. In the embodiment of the present invention, by adding the sheets to the periphery of the large area tellurium zinc cadmium substrate, the polishing area is increased, since the 'collapse' phenomenon inherent in the polishing process is serious in a certain area, usually about 5 mm, a 'collapsed' area generated during a wafer polishing process is controlled such that the 'collapsed' area is controlled within the area of the sheets, and the surface flatness of a tellurium zinc cadmium wafer is improved.

Description

technical field [0001] The invention relates to the field of optoelectronic technology, in particular to a surface processing method and device for a cadmium zinc telluride substrate. Background technique [0002] Cadmium zinc telluride (CdZnTe) substrate is the best substrate material for liquid phase epitaxy of mercury cadmium telluride (HgCdTe) thin films. High-quality CdZnTe wafer surface finish is of particular importance for device performance. The surface quality of the substrate directly affects the lattice quality of the HgCdTe liquid phase epitaxial layer and the subsequent device processing technology. [0003] As the substrate material of heteroepitaxy HgCdTe, CdZnTe has high requirements on its thickness uniformity TTV. When the ray propagates in a solid, its intensity has an exponential relationship with the distance it passes through. The energy attenuation of the ray in the detector is exponential with its thickness, and the uneven thickness of the wafer wi...

Claims

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Application Information

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IPC IPC(8): H01L31/18
CPCH01L31/1832Y02P70/50
Inventor 侯晓敏刘江高张瑛侠徐强强吴卿孙浩
Owner 11TH RES INST OF CHINA ELECTRONICS TECH GROUP CORP
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