Fully Differential Switched Capacitor Integrator

Abstract

The present disclosure provides a fully differential switched capacitor integrator, including: an operational amplifier unit, including an operational amplifier for providing predetermined gain and bandwidth; a switched capacitor unit, including: a switched capacitor integration unit, connected across the input terminal of the operational amplifier Between the output terminal and the series branch including MOS switch Φ2 and capacitor C1, capacitor C3 is connected in parallel to the above branch, and a MOS switch Φ1 is also provided between the MOS switch Φ2 and capacitor C1 to connect to the reference voltage Vref, and Part of the positive feedback capacitor C2 is connected to the output terminal of the opposite polarity of the operational amplifier; the switched capacitor common-mode feedback unit is set between the positive output terminal and the negative output terminal of the operational amplifier, which is a six-switch four-capacitor structure; no overlapping clocks The generation unit generates the clock signal of the MOS switch. The fully differential switched capacitor integrator is insensitive to parasitics, has efficient area utilization and larger time constant.

Description

technical field [0001] The present disclosure relates to a switched capacitor integrator, in particular to a fully differential switched capacitor integrator suitable for the field of biomedical electronics requiring large time constant filters, such as ECG monitoring, EEG monitoring and other signal acquisition circuits. Background technique [0002] In electrophysiological signal monitoring circuits such as ECG and EEG, in order to collect electrophysiological signals ranging from tens of microvolts to several millivolts, the front-end amplifier usually has an amplification factor of about 100 times to reduce the equivalent input noise of subsequent circuits. It is divided into AC coupling type and DC coupling type. In order to avoid the DC offset of tens to hundreds of millivolts of the electrode from saturating the amplifier, and to ensure that the signal above 0.1Hz to 0.5Hz can be collected, the AC coupling type uses a large capacitor to block DC. , The DC-coupled type...

AI Technical Summary

Problems solved by technology

[0005] In addition, there is an OTA-C structure or a digital processing circuit to increase the time constant of the integrator, which is more complex

[0006] To sum up, in the case of obtaining a large time constant, ease of design, and high precision, the fully differential switched capacitor integrator has obvious advantages, but to continue to increase its time constant, only increase the capacitor C3 or Reducing capacitors C0 and C1, increasing C3 will increase the chip area, reducing C0 and C1 will make the charge injection and clock feedthrough effects of MOS switches relatively worse, and the influence of parasitic capacitance of metal traces in the layout will also be relatively reduced. Big

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