Power semiconductor device with charge balance design

Abstract

An embodiment of the invention relates to a power semiconductor device with a charge balance design. A semiconductor body having first and second vertically spaced apart surfaces is formed. A gate trench that vertically extends from the first surface of the semiconductor body towards the second surface is formed. A gate electrode and a gate dielectric are formed in the gate trench. The gate dielectric electrically insulates the gate electrode from adjacent semiconductor material. A doped superjunction region vertically extending from a bottom of the gate trench towards the second surface of the semiconductor body is formed. The doped superjunction region includes first, second, and third doped pillars vertically extending from the first surface of the first semiconductor layer and directly adjoining one another. The second pillar is laterally centered between the first and third pillars and has an opposite conductivity type as the first and third pillars.

Description

technical field [0001] The present application relates to power semiconductor devices, and more particularly to drift region structures that enhance the electrical performance of power semiconductor devices. Background technique [0002] Power semiconductor devices, particularly field-effect controlled switching devices such as metal-oxide-semiconductor field-effect transistors (MOSFETs) or insulated-gate bipolar transistors (IGBTs), have been used in a variety of applications, including but not limited to as power supplies and switches in power converters, electric vehicles, air conditioners and even stereo systems. Especially with regard to power devices capable of switching high currents and / or operating at higher voltages, low on-state resistance Ron, high breakdown voltage U bd and / or high robustness. A power MOSFET generally includes a drain region, a drift region adjacent to the drain region, and a source region, each region having a first conductivity type, and the...

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Problems solved by technology

However, these approaches generally lead to poorer electrical performance tradeoffs, such as poorer diode reverse recovery softness and higher on-state losses and thus poorer V ce,sat (collector-emitter saturation voltage) and E off (turn off loss)

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