III-V CMOS type persudomorphic heterojunction field effect transistor

Abstract

The invention relates to the technical field of semiconductor device production and specifically relates to a wide band gap III-V CMOS type persudomorphic heterojunction field effect transistor which is based on a silicon substrate and combines an n channel transistor and a p channel transistor. According to the heterojunction field effect transistor, a material is epitaxially grown through adoption of an MOCVD or MBE device. The heterojunction field effect transistor is composed of a first multilayer lattice strain buffer layer, an InGaSb channel layer, an AlGaSb barrier layer, a GaSb cap layer, a second multilayer lattice strain buffer layer, an InGaAs channel layer, an AlGaAs barrier layer and an In<X>Ga<1-X>As cap layer which are epitaxially grown on a high resistivity silicon substrate in sequence. According to the transistor, a migration rate of the p channel transistor can be effectively improved, so the problem that great difference exists between the migration rates of the n channel transistor and the p channel transistor in the III-V is solved; a wide band gap III-V transistor channel with high carrier speed and a high drive current is provided; the short channel effect resulting from an equal-proportion reduction process of the transistor is effectively improved; the power consumption is reduced; the Moore's law is overcome; a limit is broken; and the equal-proportion reduction process of a semiconductor industry is maintained.

Description

technical field [0001] The invention belongs to the technical field of semiconductor device manufacturing, and in particular relates to a III-V CMOS type pseudo-heterojunction field-effect transistor. Background technique [0002] According to Moore's Law, "the number of components that can be accommodated on an integrated circuit will double every 18-24 months, and the performance will also double." Generally speaking, if ICs of the same specification are produced under the same area of ​​wafers, with the advancement of process technology, the output of ICs can be doubled every one and a half years. Converted to cost, that is, every other year The half cost can be reduced by 50%, and the average annual cost can be reduced by more than 30%. According to the extension of Moore's Law, IC technology advances a generation every one and a half years. International semiconductor manufacturers basically follow this law. [0003] However, Intel, the largest chip manufacturer in t...

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Problems solved by technology

[0006] The purpose of the present invention is to provide a III-V CMOS type pseudo-heterojunction field effect transistor, which can well solve the problem of difficulty in reducing power consumption and short channel effect of existing transistors in the process of scaling down. problem to overcome

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