Trench gate metal oxide field effect transistor and manufacturing method thereof

Abstract

The invention relates to a trench gate metal oxide field effect transistor, which comprises a front metal electrode, a back metal electrode, an N-type single crystal substrate, an N-type epitaxial layer and a first P-type doping region, wherein a central part of the N-type epitaxial layer and a central part of the first P-type doping region are provided with a vertical trench, a first dielectric layer is arranged between the side wall of a grid electrode in the trench and the first P-type doping region, a second dielectric layer is arranged between the bottom of the grid electrode and the epitaxial layer, the first P-type doping region is provided with a first N-type doping region at the part close to the two sides of the trench, the first P-type doping region is further provided with a second P-type doping region at the part away from the two sides of the trench, the internal part of the epitaxial layer is further provided with a third P-type doping region and a second N-type doping region which are contacted with the lower part of the second dielectric layer, the third P-type doping region and the second N-type doping region are enabled to be mutually staggered and spaced, and a plurality of PN junction units are formed in the length direction and the thickness direction. According to the invention, parasitic capacitance between a grid electrode and a drain electrode of a low trench gate SiC MOSFET can be reduced, the electric field intensity at the bottom of the trench is reduced, and turn-on of a parasitic BJT (Bipolar Junction Transistor) is suppressed.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a trench gate metal oxide field effect transistor and a manufacturing method thereof. Background technique [0002] The withstand voltage of a high-voltage power device is directly proportional to the thickness of the withstand voltage layer of the device. The thickness of the withstand voltage layer is inversely proportional to the critical electric field of the material. Since the critical electric field of silicon carbide materials is about 10 times that of silicon, when using silicon carbide materials to prepare power devices, a thinner voltage withstand layer can be applied to achieve the same withstand voltage requirements, and it is also beneficial to reduce the on-resistance of the device. In addition, silicon carbide (SiC) also has excellent physical and electrical properties, and has the advantages of wide band gap, high breakdown field strength, high electron s...

AI Technical Summary

Problems solved by technology

[0003] However, in the trench gate SIC MOSFET, the maximum electric field intensity is transferred to the bottom corner of the trench gate, which may easily cause hot carriers to inject into the gate oxide layer or be trapped by traps at the oxide layer interface, causing problems such as device threshold voltage drift and affecting the device. long-term reliable use

At the same time, due to the parasitic capacitance between the gate and the drain in the trench gate, the delay time when the device is turned off is too long, and the gate voltage is easy to oscillate when it is turned on.

On the other hand, during the switching process of the MOSFET device, due to the simultaneous existence of high current and high voltage, when the hole carriers generated by the impact ionization at the large electric field in the device flow out through the P well of the MOS region, a voltage drop occurs on the P well. When the voltage drop increases to a certain PN junction opening voltage, the parasitic BJT composed of the N+ layer in the source region, the P well, and the N-type withstand voltage layer is turned on, causing a secondary breakdown of the device and failure.

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