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Semiconductor element and preparation method thereof

A semiconductor and N-type semiconductor technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as core grain electrical anomalies, lower production yields, chemical solution corrosion, etc., to release stress and improve Corrosion resistance, the effect of enhancing corrosion resistance

Active Publication Date: 2016-01-20
ANHUI SANAN OPTOELECTRONICS CO LTD
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  • Abstract
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  • Application Information

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Problems solved by technology

[0005] However, since the aluminum nitride layer formed by the PVD method has the characteristics of polylattice and anisotropy, it is easier to be corroded by chemical solutions, so when the epitaxial wafer contains a buffer layer formed by the PVD method, the surface of the epitaxial wafer is cut After soaking in chemical solution, over-corrosion of the buffer layer or the contact surface between the buffer layer and the substrate is easy to occur, resulting in abnormal electrical properties of the formed core particles and reducing production yield

Method used

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  • Semiconductor element and preparation method thereof
  • Semiconductor element and preparation method thereof
  • Semiconductor element and preparation method thereof

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Embodiment 1

[0038] See attached Figure 1~2 , a semiconductor element in the present invention, comprising a substrate 10, a buffer layer 20, an N-type semiconductor layer 30, a light-emitting layer 40, and a P-type semiconductor layer 50, wherein the buffer layer 20 is at least composed of al x N 1-x Layer 21 and a thickness of 5 to 500 Angstroms of Al y o 1-y Layer 22 (0x N 1-x The thickness of layer 21 ≥ Al y o 1-y Layer 22 thickness. It was found experimentally that when Al x N 1-x Layer 21 thickness vs. Al y o 1-y The larger the thickness ratio of the layer 22 is, the better the lattice quality of the buffer layer 20 is. In the structure of the present invention, the use of Al x N 1-x Layer 21 and Al y o 1-y The superlattice structure of the layer 22 forms the buffer layer 20, which reduces the degree of corrosion of the sidewall by the chemical solution during the sidewall corrosion process of the subsequent chip manufacturing process, and improves the chip yield.

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Embodiment 2

[0046] See attached image 3 , The difference between this embodiment and Embodiment 1 is that the buffer layer 20 of the present invention includes Al with a thickness of 5-500 angstroms. x N 1-x Layer 21 and a thickness of 5 to 500 Angstroms of Al y o 1-y layer 22 (0x N 1-x Layer 21 placed in Al y o 1-y Between the layer 22 and the substrate 10, the number of cycles of the superlattice structure layer ≥ 2, Al x N 1-x The thickness of layer 21 ≥ Al y o 1-y Layer 22 thickness.

[0047] The difference between the preparation method adopted in this embodiment and the preparation method in Example 1 is: S2. Put the substrate 10 into the chamber of a PVD machine, and deposit Al with a thickness of 5 to 500 angstroms on the surface of the substrate 10 by using the PVD method. x N 1-x Layer 21 and a thickness of 5 to 500 Angstroms of Al y o 1-y layer 22 (0x N 1-x layer 21, again in Al x N 1-x Deposit Al on the surface of layer 21 y o 1-y The layer 22 is stacked in ...

Embodiment 3

[0049] See attached Figure 4 The difference between this embodiment and Embodiment 1 is that a non-doped semiconductor layer 60 is deposited between the buffer layer 20 and the N-type semiconductor layer 30, and this layer is used to further improve the crystal quality of the subsequent epitaxial layer and improve the photoelectric performance of the semiconductor element. .

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Abstract

The invention provides a semiconductor element, which comprises a superlattice structure buffer layer including an Al<x>N<1-x> layer and an Al<y>O<1-y> layer (both x and y are less than 1 and greater than 0). According to the superlattice structure buffer layer, the corrosion degree of a chemical solution can be reduced and the chip yield is improved in a side wall corrosion process of a chip manufacturing process. Meanwhile, the invention provides a preparation method to prepare the superlattice structure buffer layer. The effects of the semiconductor element are achieved.

Description

technical field [0001] The invention belongs to the technical field of semiconductors, in particular to a semiconductor element and a preparation method thereof. Background technique [0002] The cutting technology of semiconductor components has gradually developed from diamond knife cutting to ordinary laser cutting. Generally speaking, the wavelength of the laser is 355nm or 266nm. Its characteristic is that it can cut sapphire substrates and various layers, such as Gallium nitride layer, Bragg reflection layer, metal layer, etc. As for cutting, the laser can be used to scratch the surface of the epitaxial wafer to form surface cutting lines, and the laser can also be used to focus on the inside of the substrate to form invisible cutting lines, so as to achieve the purpose of separating individual core particles. [0003] When the surface of the epitaxial wafer is scratched by a laser to form a surface scribe line, the impurities formed after laser ablation adhere to the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L33/04H01L33/12
CPCH01L33/04H01L33/12H01L21/02458H01L21/02488H01L21/02507H01L27/15H01L33/10H01L33/46H01L33/48
Inventor 周圣伟卓昌正林兓兓张家宏
Owner ANHUI SANAN OPTOELECTRONICS CO LTD
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