Fin portion manufacturing method and fin type field effect transistor and manufacturing method thereof

Abstract

A fin portion manufacturing method comprises forming into an imaging hard mask layer on a semiconductor substrate; forming into a lateral wall on the lateral wall of the imaging hard mask layer; etching a semiconductor substrate for the first time to form into a gradually narrowed groove with the lateral wall serving as a mask; filling silicon oxide into the groove and removing partial silicon oxide inside the groove and reserving partial height of silicon oxide; removing the lateral wall, etching the groove for the second time to obtain the fin portion of the fin type field effect transistor with the hard mask layer serving as the mask. The range of the angle formed between the fin portion lateral wall at the groove opening and the semiconductor substrate plane is 80 to 85 degrees and the range of the angle formed between the fin portion lateral wall at the bottom and the semiconductor substrate is 70 to 80 degrees. The invention also provides a fin type field effect transistor and a manufacturing method thereof based on the fin portion manufacturing method. According to the technical scheme of the fin portion manufacturing method, the height of the fin portion is easy to control and the fin type field effect transistor response time is short.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a manufacturing method of a fin, a fin field effect transistor and a manufacturing method thereof. Background technique [0002] With the continuous development of semiconductor process technology, as the process node gradually decreases, gate-last (gate-last) process has been widely used to obtain an ideal threshold voltage and improve device performance. However, when the feature size (CD, Critical Dimension) of the device is further reduced, even if the gate-last process is adopted, the structure of the conventional MOS field effect transistor can no longer meet the requirements for device performance. Widespread concern. [0003] Fin field effect transistor (Fin FET) is a common multi-gate device, figure 1 A schematic diagram of a three-dimensional structure of a fin field effect transistor in the prior art is shown. Such as figure 1 As shown, it includes: a sem...

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Problems solved by technology

[0006] The problem to be solved by the present invention is to propose a new fin manufacturing method, fin field effect transistor and its manufacturing method to improve the existing fin height and shape which are difficult to control, which is not conducive to applying tensile stress or compressive stress to the channel. stress, causing the response speed of the FinFET to be too slow

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