Semiconductor device with height-controllable fin and preparation method

Abstract

The invention relates to a semiconductor device with a height-controllable fin and a preparation method. The preparation method comprises the following steps: providing a semiconductor substrate; forming a first semiconductor material layer, a second semiconductor material layer and a hard mask layer on the substrate; etching the hard mask layer, a second semiconductor material layer and a first semiconductor material layer to form a trench and a fin pattern; performing isotropic etching to remove a part of the first semiconductor material layer in the fin pattern to form a virtual fin with reduced critical size; depositing dielectric layers to fill the trench and cover the fin pattern; etching the dielectric layers till the second semiconductor material layer below, in order to expose the second semiconductor material layer to form the fin. The preparation process of the fin is easy to control, and the obtained device is more stable.

Description

Technical field [0001] The present invention relates to the field of semiconductors. In particular, the present invention relates to a semiconductor device with highly controllable fins and a manufacturing method. Background technique [0002] The improvement of integrated circuit performance is mainly achieved by continuously reducing the size of integrated circuit devices to increase its speed. At present, due to the pursuit of high device density, high performance and low cost, the semiconductor industry has advanced to the nanotechnology process node, especially when the size of semiconductor devices drops to 22nm or below, challenges from manufacturing and design have led to three-dimensional design Such as the development of fin field effect transistors (FinFET). Compared with the existing planar transistors, the FinFET device has superior performance in channel control and reduction of shallow channel effects; the planar gate structure is arranged above the channel, and i...

AI Technical Summary

Problems solved by technology

[0008] Currently, in the fabrication of fin field effect transistors, it is difficult to control the height of the fins, which leads to the occurrence of parasitic capacitance or self-heating effect (Self-Heating Effect) and floating body effect (floating body effect) in the prior art. , both lead to a greatly reduced performance and stability of smaller devices, therefore, the preparation process needs to be improved to eliminate the above problems

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