Bias voltage temperature instability testing circuit and testing method thereof

Abstract

The invention discloses a bias voltage temperature instability testing circuit which comprises a circular vibrator circuit. The vibrator circuit comprises n grades of testing circuits which are the same in structure. Each testing circuit comprises a first node, a second node and a third node. The third node of each testing circuit is connected with the first node of a former testing circuit. Each testing circuit comprises a PMOS tube to be tested, an NMOS tube to be tested, a switch PMOS tube, a switch NMOS tube and at least one pair of partial pressure PMOS tube and partial pressure NMOS tube, wherein the PMOS tube to be tested and the NMOS tube to be tested are complementary, the switch PMOS tube and the switch NMOS tube are complementary, and the partial pressure PMOS tube and the partial pressure NMOS tube are complementary. The invention further discloses a testing method for the bias voltage temperature instability testing circuit. The method comprises the steps of providing the bias voltage temperature instability testing circuit, testing the negative bias pressure temperature instability of the PMOS tube to be tested and testing the positive bias pressure temperature instability of the NMOS tube to be tested. The bias voltage temperature instability testing circuit can test the negative bias pressure temperature instability of the PMOS tube to be tested and the positive bias pressure temperature instability of the NMOS tube to be tested.

Description

technical field [0001] The invention relates to the field of integrated circuit reliability testing, in particular to a bias temperature instability testing circuit and a testing method thereof. Background technique [0002] Bias Temperature Instability (BTI for short) is one of the basic problems of reliability of Complementary Metal Oxide Semiconductor (CMOS for short). Among them, BTI is divided into negative bias temperature instability (Negative Bias Temperature Instability, referred to as NBTI) and positive bias temperature instability (Positive Bias Temperature Instability, referred to as PBTI). NBTI refers to the degradation of a series of electrical parameters caused by applying negative gate voltage to the PMOS tube at high temperature. The generation process of NBTI effect mainly involves the generation and passivation of positive charges, that is, the generation of interface trap charges and fixed positive charges in the oxide layer. As well as the diffusion pro...

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Problems solved by technology

[0003] figure 1 It is a schematic diagram of a bias temperature instability test circuit in the prior art. The bias temperature instability test circuit is based on a ring oscillator circuit, and the ring oscillator circuit oscillates by testing the PMOS transistor and the NMOS transistor before and after the pressure voltage is applied. Frequency conversion, testing the negative bias temperature instability of the PMOS tube and the positive bias temperature instability of the NMOS tube, but the bias temperature instability test circuit cannot distinguish between the negative bias temperature instability of the PMOS tube and the positive bias temperature instability of the NMOS tube. The degree of influence of the positive bias temperature instability of the NMOS tube on the circuit oscillation frequency

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