Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Sigma-delta PLL frequency measuring circuit and method

A frequency measurement and circuit technology, applied in the fields of electronics and time-frequency measurement, can solve the problems of limiting frequency measurement accuracy, difficulty in implementation, quantization error, etc., and achieves improved frequency measurement resolution, improved resolution performance, and low device requirements. Effect

Active Publication Date: 2014-01-01
NANJING UNIV OF SCI & TECH
View PDF6 Cites 11 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, there are three basic principles of frequency measurement circuits commonly used in the domestic and foreign markets: (1) measure the frequency of the periodic signal by performing Fourier transform on the measured signal, (2) measure the frequency of the measured frequency signal within the standard gate time The measured frequency value is obtained by counting the number of cycles. (3) Based on the frequency measurement circuit of the phase-locked loop, the frequency identification is realized by using the characteristic that the control signal of the voltage-controlled oscillator (VCO) is proportional to the frequency; among them, the first (1 ) technology has a certain anti-noise performance, but it is inevitable to truncate the time domain in the process of Fourier transform. Domain signal characteristics, so the accuracy of its measurement results is poor
Type (2) technology can complete frequency measurement and digital output at the same time, and the sampling frequency of this system is only twice the frequency of the signal to be measured, there is no high requirement for oversampling rate, the measurement is convenient, and the reading is direct. There are quantization errors caused by counting, which limit the improvement of frequency measurement accuracy; although there are improved multi-cycle synchronization methods and delay chain methods to limit quantization errors, the multi-cycle synchronization method is at the expense of system bandwidth, while the delay chain method The precision requirements of the delay unit are extremely high, and it is difficult to realize, and there are problems such as uneven distribution of delay chain length and delay jitter, so that the actual precision is much lower than the theoretical value
Type (3) technology first locks the frequency of the signal under test through a phase-locked loop, outputs a voltage signal proportional to the signal under test, and then converts the voltage signal into a digital frequency through an analog-to-digital converter (ADC). The measured frequency is converted into a digital signal. The advantage of the phase-locked loop frequency measurement method is that the circuit is simple and easy to implement, but the VCO in the phase-locked loop itself will introduce phase noise, and the VCO has nonlinearity and temperature sensitivity, which will affect the final frequency measurement. the accuracy of
[0004] To sum up, the currently commonly used frequency measurement methods have the problems of large noise and low resolution, and it is difficult to adapt to the high-precision frequency reading requirements of new crystal oscillators and resonant sensors.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Sigma-delta PLL frequency measuring circuit and method
  • Sigma-delta PLL frequency measuring circuit and method
  • Sigma-delta PLL frequency measuring circuit and method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0021] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments.

[0022] combine figure 1 , the sigma-delta PLL frequency measurement circuit of the present invention is a closed-loop negative feedback system as a whole, including a shaping circuit 100, a phase detector 200, a loop filter 300, an ADC400 and a delay link 500 arranged sequentially from the input end, And the output terminal of the delay link 500 is fed back to the phase detector 200 through the counter 600, wherein: the shaping circuit 100, after filtering and amplifying the signal to be tested, converts it into a square wave signal V of the same frequency out ; Phase detector 200, measuring the signal V to be tested after shaping out with the counter output signal C out The zero-crossing time difference, and the output area and time difference e n proportional to the pulse current signal I out ; Loop filter 300, to the output cur...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a sigma-delta PLL frequency measuring circuit and method. The circuit comprises a rectifying circuit, a phase discriminator, a loop filter, an ADC and a delay link which are sequentially arranged from the input end. The output end of the delay link is fed back and input to the phase discriminator through a counter. The frequency measuring method comprises the steps that after the rectifying circuit filters and amplifies a signal to be detected, the signal to be detected is converted into a square signal with the frequency same as that of the signal to be detected; the phase discriminator measures the zero crossing point time difference of the square signal and an output signal of the counter, and a pulse current signal with the output area and the time in a direct proportion; after the integration and the filtering are carried out on an output current of the phase discriminator through the loop filter, the output current is converted into a voltage signal; the ADC converts analog voltage output by the loop filter into a digital signal; the delay link delays the digital signal output by the ADC, and therefore the frequency of the signal to be detected is determined; a counter output signal with the clock period and the delayed digital signal in a direct proportion is generated by the counter, and is output to the phase discriminator. The anti-noise capacity is strong in the process of measuring the frequency, the resolution ratio is high, and the frequency measurement can be achieved easily.

Description

technical field [0001] The invention relates to the field of electronics and time-frequency measurement, in particular to a sigma-delta (Σ-Δ) PLL (Phase Locked Loop, phase-locked loop) frequency measurement circuit and method. Background technique [0002] In electronic technology, frequency has always been one of the most basic parameters, and has a very close relationship with the measurement scheme and measurement results of many electrical parameters, so the measurement of frequency is also particularly important. In recent years, with the development of electronic information technology, the precision of crystal oscillators and resonant sensors with frequency as output signal is constantly improving, and their applications are becoming more and more extensive. The development of matching low-noise frequency measurement circuits is also It seems more and more urgent. [0003] At present, there are three basic principles of frequency measurement circuits commonly used in...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G01R23/02
Inventor 夏国明裘安萍施芹石然苏岩丁衡高
Owner NANJING UNIV OF SCI & TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products