High-speed single-selection multiplexer based on CMOS (Complementary Metal-Oxide-Semiconductor Transistor) process

Abstract

The invention discloses a high-speed single-selection multiplexer based on a CMOS (Complementary Metal-Oxide-Semiconductor Transistor) process, which comprises a CML (Current-Mode Logic) multiplexer unit and an equalizer, wherein the equalizer comprises a plurality of cascaded equalization units and a CML buffer unit; each equalization unit comprises two equalization NMOS (N-channel metal oxide semiconductor) differential input pair transistors; each grid electrode is respectively connected with a front-cascade differential amplifying output signal, each drain electrode respectively outputs an equalization differential signal and is connected with a power supply through a second resistance, and each source electrode is respectively grounded through a first constant flow source; a first capacitance and a first resistance are respectively connected between the source electrodes of the two equalization NMOS transistors; and the CML buffer unit is used for shaping the equalization differential signals and outputting the shaped equalization differential signals. The high-speed single-selection multiplexer based on the CMOS process is realized by adopting a CMOS standard process, has obvious cost advantage, can be integrated with other large-scale digital circuits easily, completely meets the development tendency of high-speed data communication integration circuits with high performance and low cost, is combined with the technology of the equalizer creatively, breaks through bandwidth limit, and meets the requirement of high-speed data communication.

Description

technical field [0001] The invention relates to a high-speed multi-choice multiplexer, which is used for multi-channel data crossover, data routing exchange, high-speed automatic test equipment and the like. Background technique [0002] In high-speed data communication technology, multiple selector multiplexers are widely used. Such as: 2 to 1 multiplexer, 17 to 1 multiplexer, 34 to 1 multiplexer and so on. [0003] The data rate of high-speed data communication is usually above 1Gbps. In such high-speed data processing applications, standard CMOS or TTL level logic circuits have insufficient anti-interference performance, circuit noise control and circuit power consumption. Therefore, CML Circuit (Current Mode Logic, current mode logic) is widely used. The CML circuit can realize logical functions such as inversion, exclusive OR, and multiplexing, and adopts differential signal input and differential signal output. Therefore, it has strong anti-interference ability, low ...

AI Technical Summary

Problems solved by technology

[0011] The technical problem to be solved by the present invention is to solve the problem that the high-speed multi-choice multiplexer has high manufacturing cost and cannot meet the needs of further integration

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