Method of manufacturing semiconductor element metal gate stack

Abstract

The invention provides a method of manufacturing a semiconductor element metal gate stack. The present disclosure provides a method that includes forming a high k dielectric layer on a semiconductor substrate; forming a polysilicon layer on the high k dielectric layer; patterning the high k dielectric layer and polysilicon layer to form first and second dummy gates in first and second field effect transistor (FET) regions, respectively; forming an inter-level dielectric (ILD); applying a first CMP process to the semiconductor substrate, exposing the first and second dummy gates; removing the polysilicon from the first dummy gate, resulting in a first gate trench; forming a first metal electrode in the first gate trench; applying a second CMP process; forming a mask covering the first FET region and exposing the second dummy gate; thereafter removing the polysilicon from the second dummy gate, resulting in a second gate trench; forming a second metal electrode in the second gate trench; and applying a third CMP process. The invention maintains the integration of metal gate electrode and the expected working function and improves the circuit effect.

Description

technical field [0001] The present invention relates to a manufacturing method of a semiconductor element, in particular to a manufacturing method of a semiconductor element forming metal gate stacks. Background technique [0002] When a semiconductor device such as a metal oxide semiconductor field effect transistor (MOSFET) is scaled by different technologies, high-k dielectric materials and metals are suitable for forming a gate stack. However, in the method of forming metal gate stacks of n-type metal-oxide-semiconductor (nMOS) transistors and p-type metal-oxide-semiconductor (pMOS) transistors, different problems arise when integrating processes and materials. For example, when the p-type metal gate of a p-type metal-oxide-semiconductor (pMOS) transistor is exposed to a process that removes polysilicon to form an n-type metal gate, the aluminum filling the p-type metal gate electrode can be damaged and recessed . For example, the n-type metal layer is deposited uneven...

AI Technical Summary

Problems solved by technology

For example, the n-type metal layer will be deposited unevenly in the recessed p-type metal gate, resulting in an increase in the resistance of the p-type metal gate

Furthermore, the uneven p-type metal gate will also lead to changes in device performance

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