Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Method for integrating copper and materials with low dielectric coefficient

A technology of low dielectric constant material and copper etching, which is applied in the manufacture of circuits, electrical components, semiconductors/solid-state devices, etc.

Inactive Publication Date: 2013-04-10
FUDAN UNIV
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Simultaneously, the present invention further provides a method for integrating copper and low dielectric constant materials. After the copper is etched, the medium is filled, which solves the problem of etching low dielectric constant materials in integrated circuit copper interconnections. and problems with holes in the media

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for integrating copper and materials with low dielectric coefficient
  • Method for integrating copper and materials with low dielectric coefficient
  • Method for integrating copper and materials with low dielectric coefficient

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0029] Below in conjunction with accompanying drawing and specific embodiment the present invention is described in further detail:

[0030] Step 1: Please refer to figure 1 , an integrated substrate 200 is provided, on which a thin film 201, a thin film 202 and a thin film 203 are sequentially formed, the substrate 200 is a silicon wafer or silicon oxide, the material of the thin film 201 is copper, the material of the thin film 202 is carbon, and the thin film 203 is photoresist layer.

[0031] Step 2: Please refer to figure 2 , use photolithography technology and etching technology to etch the film 203 and film 202 according to the pattern, then immerse them in a solution containing hydrogen peroxide or ozone, and irradiate them vertically with light rays 300a, 300b, 300c and 300d, the light rays 300a, 300b , 300c and 300d are ultraviolet rays.

[0032] Step 3: Please refer to image 3 , etch the copper according to the pattern and remove the film 203 and the film 202 ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
electrical resistivityaaaaaaaaaa
Login to View More

Abstract

The invention belongs to the technical field of a semiconductor, in particular to a method for integrating copper and materials with the low dielectric coefficient. The method comprises the following steps: using a wet method for etching; using light irradiation for promoting the copper etching by the electrochemical etching technology; and then, filling media with the low dielectric coefficient on the copper for forming the interconnection of the copper and low-k media. Because of the feature of the anisotropic property of light, the invention can realize the anisotropic property etching of the copper and various other metals, and at the same time, the filling of the low-k media is carried out after the copper etching, so the low-k material etching problem in the copper interconnection of integrated circuits and the problems caused by holes in the media are solved.

Description

technical field [0001] The invention belongs to the technical field of semiconductor devices, and in particular relates to an integration method for preparing semiconductor chips by interconnecting copper and low dielectric constant materials. Background technique [0002] With the continuous advancement of VLSI process technology, the feature size of semiconductor devices continues to shrink, and the chip area continues to increase. People are faced with how to overcome the RC (R refers to resistance, C refers to Capacitance) The problem of significant increase in delay has become a key constraint for the further development of the semiconductor industry. In order to reduce the RC delay caused by interconnection, various measures have been adopted. [0003] Compared with conventional aluminum, copper has the following advantages: First, the resistivity of copper is smaller (Cu: 1.7 μΩ / cm, Al: 3 μΩ / cm). Second, copper interconnects have less parasitic capacitance than alum...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L21/3213
Inventor 王鹏飞孙清清丁士进张卫
Owner FUDAN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products