Medium layer forming method and metallic layer leveling method

Abstract

A method for forming a dielectric layer comprises the following steps: providing a semiconductor substrate; forming a metal layer covering the semiconductor substrate; performing heat treatment of the semiconductor substrate, on which the metal layer is formed; and forming a dielectric layer for covering the metal layer and the semiconductor substrate which are subjected to heat treatment. The method can reduce formation of a needle hole defect inside the dielectric layer. A method for leveling a metal layer comprises the following steps: providing a semiconductor substrate; forming a metal layer covering the semiconductor substrate; leveling the metal layer; and performing heat treatment of the semiconductor substrate, on which the metal layer is formed. The methods can enhance the interconnection effect of the metal layer with the subsequent metal layer as well as with the surroundings.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a dielectric layer and a method for flattening a metal layer. Background technique [0002] Semiconductor devices generally require more than one metal layer to provide sufficient interconnection capability. There is a dielectric layer between the metal layers and between the metal layer and the active area of ​​the device. The interconnection between the metal layers and the active area of ​​the device and the active area of ​​the device Connections between external circuits are realized through holes filled with conductive material, and the holes penetrate through the dielectric layer. [0003] Before forming the through hole, the dielectric layer needs to be formed in advance. The step of forming the dielectric layer includes: as figure 1 As shown, a semiconductor substrate 10 is provided, and the surface layer of the semiconductor su...

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Problems solved by technology

Actual production finds, such as Figure 5 As shown, there are generally pinhole defects (pin holes) 40 in the dielectric layer 20 formed by the traditional process, and the pinhole defects 40 are easy to cause the resist layer 30 with the through hole pattern 32 to be removed as a mask. After part of the dielectric layer 20, in the through hole region of the dielectric layer 20, there is a thinned or even missing dielectric layer, and then in the subsequent process of removing the resist layer 30, the dielectric layer The missing area of ​​20 will expose the metal layer connected to the dielectric layer, and since the resist layer is usually removed by oxygen ashing, when the resist layer is removed, oxygen will oxidize the missing area of ​​the dielectric layer The exposed metal layer, and the surface of the metal layer exposed in the missing area of ​​the dielectric layer forms a metal oxide, and then in the subsequent cleaning process, the metal oxide will be removed. With the removal of the metal oxide, such as Image 6 As shown, the surface of the metal layer exposed by the through hole will have a surface depression 42, and the surface depression 42 will easily cause a decrease in reliability when the through hole is subsequently filled.

Obviously, this method is only used to form a silicon nitride protective layer without pinhole defects under specific process conditions, and the scope of application is limited

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