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Semiconductor device and method for making the same

a technology of semiconductor devices and semiconductors, applied in semiconductor devices, semiconductor/solid-state device details, electrical apparatus, etc., can solve problems such as framing being susceptible to heat, memory operation becoming unstable, and memory no longer operating

Inactive Publication Date: 2001-06-07
ROHM CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

[0011] It is therefore an object of the present invention to provide a semiconductor device in which the electrode of the semiconductor chip and the component element to be connected with the electrode are connected appropriately with each other without damaging a property of the semiconductor chip.
[0015] According to the above arrangement, the electrode pad conventionally formed by aluminum is covered by the gold bump. This eliminates need for such an operation at the time of wirebonding as removing a coat of oxide formed on the electrode pad. Thus, there is no need for applying a large amount of energy at the time of wirebonding such as applying intense ultrasonic wave for removing the coat of oxide, or heating the semiconductor chip to a high temperature. Further, at the time of wirebonding, the gold bump absorbs part of pressure applied by the capillary. Thus, the semiconductor chips are better protected from damage caused by the wirebonding operation. Still further, the wire made of gold is bonded to the electrode pad made of gold. Since this bond is made between the same kind of metal, only a smaller amount of energy is necessary to achieve the bonding. Still further, the bond is not susceptible to oxidization, and therefore can keep a good quality of connection.
[0018] According to the preferred embodiment, the semiconductor chip is a ferroelectric memory chip. The ferroelectric memory chip is a nonvolatile memory chip utilizing the spontaneous polarization behavior of a ferroelectrics having a high dielectric constant. This type of memory enables overwriting of stored information at an extremely high speed and at a low voltage, by reversing the direction of polarization. The ferroelectrics used in the ferroelectric memory chip is susceptible to heat (becoming unable to polarize spontaneously at a temperature of 170-180 degrees Celsius). For this reason, the ferroelectric memory chip becomes unstable in operation once heated above a specific temperature. According to the present invention, in order to achieve the wirebonding between the electrode pad and the gold wire, a smaller amount of energy may be applied as described above. For example, the heating temperature may be about 100 degrees Celsius, and the ultrasonic wave may be less intense. Thus, it is possible to establish an appropriate electric connection between the ferroelectric memory chip and a component element to be connected to the ferroelectric memory chip, without the risk of damaging the operational stability of the ferroelectric memory chip.
[0022] According to a preferred embodiment, the gold connecting member is a gold bump formed in the first semiconductor chip, or an easily deformable gold stud bump formed on the gold bump in the second semiconductor chip. When the electrical connection between the electrode pads of the two semiconductor chips is established via the gold stud, the electrode pad formed with the gold bump is pressed to the gold stud bump. During this operation, the stud bump which is easily deformable, protects the two semiconductor chips from damage caused by excessive pressure applied to the main surfaces of respective semiconductor chips faced to each other. It should be noted that the stud bump may be such as having a tip portion made easily deformable, or having another predetermined portion made easily deformable.
[0023] According to the preferred embodiment, one or both of the first semiconductor chip and the second semiconductor chip is a ferroelectric memory chip. As described earlier, the ferroelectric memory is susceptible to heat. According to the present invention, electrical connection between the first semiconductor chip and the second semiconductor chip can be established without applying a large amount of heat or an intense level of ultrasonic wave because of the easily deformable stud bump.
[0024] According to the preferred embodiment, the main surface of the first semiconductor chip and the main surface of the second semiconductor chip are bonded to each other by a resin adhesive. With this arrangement, the first semiconductor chip and the second semiconductor chip are mechanically connected by the resin adhesive while allowing the pair of electrodes each formed with the gold bump to be electrically connected to each other. Thus, a high quality of electric connection can be kept as mentioned earlier, and at the same time, the main surface of each semiconductor can be well protected.

Problems solved by technology

If the FRAM containing such a ferroelectrics is heated to this Curie temperature or above, the memory operation becomes unstable, or the memory will no longer operate.
In other words, the FRAM is susceptible to heat.
However, this method is not suitable for wirebonding to a semiconductor chip which is susceptible to heat, because the semiconductor chip has to be heated up to 400 degrees Celsius.
However, the ultrasonic bonding method is disadvantageous in that an intense ultrasonic wave can break the wire.
Still however, the thermosonic bonding is only suitable for wirebonding a common type of semiconductors because the semiconductor chip must be heated to about 200 degrees Celsius.
The thermosonic bonding is still not suitable for wirebonding a semiconductor chip such as the FRAM which is extremely susceptible to heat, becoming very unstable in operation if heated to 170-180 degrees Celsius.
There is another problem.
However, aluminum is easily oxidized to form a coat of oxide, which weakens the bond between the bonding pad and the wire.
This problem becomes more significant at a higher bonding temperature, and in order to remove the coat of oxide, the ultrasonic wave of a greater intensity must be applied at a risk of breaking the metal wire.

Method used

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  • Semiconductor device and method for making the same
  • Semiconductor device and method for making the same
  • Semiconductor device and method for making the same

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Embodiment Construction

[0053] Preferred embodiments of the present invention will be described in specific details, referring to the accompanying drawings.

[0054] FIG. 1 is an overall perspective view of a semiconductor device as an embodiment of the present invention. FIG. 2 is a sectional view taken in lines 2-2 in FIG. 1.

[0055] As shown in FIGS. 1 and 2, a semiconductor device 1 generally comprises a film substrate 2 made of a polyimide resin for example, a first semiconductor chip 3 mounted to the film substrate 2, a second semiconductor chip 4 electrically connected with the first semiconductor chip 3, and a third semiconductor chip 5 mounted onto the second semiconductor chip 4.

[0056] The film substrate 2 has two end portions each formed with a plurality of through-holes 20a. At each of these through-holes 20a, a corresponding terminal 20 is formed. Each terminal 20 is provided with a thin-film terminal portion 22 formed on an upper surface of the film substrate 2, and a ball terminal portion 21 form...

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PUM

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Abstract

A semiconductor device includes a semiconductor chip having a main surface formed with an electrode pad, a package containing the semiconductor chip, a component element connected with the electrode pad within the package, a gold bump formed on the electrode pad, and a gold connecting member. The gold connecting member has an end bonded to the gold bump, and the other end bonded to the component.

Description

[0001] 1. Field of the Invention[0002] The present invention relates to a semiconductor device, and a method for making the same. More particularly, the present invention relates to a semiconductor device containing such a semiconductor chip as a ferroelectric random access memory which will become unstable in operation under a high temperature, and a method for making such a semiconductor device.[0003] 2. Background Art[0004] Much effort is being made in recent years in developing a nonvolatile memory utilizing the spontaneous polarization behavior of a ferroelectrics having a high dielectric constant. This type of memory is usually called the ferroelectric random access memory (hereinafter called FRAM). The FRAM has a construction in which a planer type ferroelectric capacitor is formed on a layer of a common CMOS transistor. The FRAM enables overwriting of stored information at an extremely high speed and at a low voltage by reversing the direction of polarization.[0005] However,...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L23/31H01L25/065
CPCH01L23/3121H01L24/06H01L24/45H01L24/48H01L24/78H01L24/85H01L24/97H01L25/0657H01L2224/05624H01L2224/1134H01L2224/13144H01L2224/16145H01L2224/32145H01L2224/32225H01L2224/45144H01L2224/48091H01L2224/48145H01L2224/48227H01L2224/48465H01L2224/48475H01L2224/48624H01L2224/73265H01L2224/75251H01L2224/78301H01L2224/85051H01L2224/85181H01L2224/8592H01L2224/97H01L2225/06506H01L2225/0651H01L2225/06513H01L2225/06579H01L2225/06582H01L2225/06586H01L2924/01013H01L2924/01029H01L2924/01074H01L2924/01078H01L2924/01079H01L2924/01082H01L2924/014H01L2924/14H01L2924/15311H01L2924/19041H01L2924/01033H01L2224/0401H01L2224/11334H01L2924/00014H01L2224/83H01L2224/85H01L2924/00H01L2224/92247H01L2224/05554H01L2224/85203H01L2224/85205H01L2224/85207H01L2224/04042H01L2924/181H01L2924/10162H01L2224/85045H01L2224/78251H01L2924/00012H01L2224/4554
Inventor OKA, HIROSHIHIROMITSU, MASAAKI
Owner ROHM CO LTD
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